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Naoki Kotani, Keiichiro Shimizu: Method of manufacturing semiconductor device. Matsushita Electronics Corporation, McDermott Will & Emery, August 7, 2001: US06271070 (91 worldwide citation)

On a main surface of a p-type silicon substrate having a bipolar transistor forming region and a MOS transistor forming region, an epitaxial layer is grown and n-type buried layers are formed. After forming a trench penetrating the buried layer, a buried polysilicon layer is formed in the trench. Th ...


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Akio Sebe, Naoki Kotani, Shinji Takeoka, Gen Okazaki, Junji Hirase, Kazuhiko Aida: Semiconductor device and method for fabricating the same. Panasonic Corporation, McDermott Will & Emery, June 8, 2010: US07732839 (35 worldwide citation)

A MIS transistor includes a gate electrode portion, insulating sidewalls formed on side surfaces of the gate electrode portion, source/drain regions and a stress film formed so as to cover the gate electrode portion and the source/drain regions. A height of an upper surface of the gate electrode por ...


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Naoki Kotani: Semiconductor device and method for fabricating the same. Panasonic Corporation, McDermott Will & Emery, May 26, 2009: US07538397 (7 worldwide citation)

A semiconductor device includes a resistor element covered by a silicon oxide film. In the semiconductor device, with respective gate electrodes of MIS transistors and impurity doped layers, i.e., non-silicide regions exposed, thermal treatment for activating an impurity and silicidization are perfo ...


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Naoki Kotani: Semiconductor integrated circuit. Matsushita Electric Industrial, Donald R Studebaker, Nixon Peabody, January 6, 2004: US06674127 (7 worldwide citation)

A semiconductor integrated circuit includes: a logic circuit section including transistors formed on an SOI substrate; and a partially-depletion-type transistor, which is formed on the SOI substrate as a switching transistor for controlling ON/OFF states of the logic circuit section and which has a ...


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Naoki Kotani: Method for manufacturing a semiconductor device having a silicon on insulator substrate. Matsushita Electric Industrial, Donald R Studebaker, Nixon Peabody, October 28, 2003: US06638799 (7 worldwide citation)

In a method for manufacturing a MIS type SOI device, when an ion-implantation is carried out to form pocket regions of an n-type MISFET, an ion-implantation mask having a mask opening and covering a body contact region of a p-type MISFET is applied, and when an ion-implantation is carried out to for ...


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Junji Hirase, Akio Sebe, Naoki Kotani, Gen Okazaki, Kazuhiko Aida, Shinji Takeoka: Semiconductor device and method for fabricating the same. Panasonic Corporation, McDermott Will & Emery, August 25, 2009: US07579227 (5 worldwide citation)

A semiconductor device includes: a high dielectric constant gate insulating film formed on an active region in a substrate; a gate electrode formed on the high dielectric constant gate insulating film; and an insulating sidewall formed on each side surface of the gate electrode. The high dielectric ...


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Naoki Kotani, Kimio Takahashi: Board for display device and display device. Sharp Kabushiki Kaisha, Birch Stewart Kolasch & Birch, February 28, 2012: US08125608 (4 worldwide citation)

A substrate for a display having, on a surface thereof, a sealing compound disposed along a periphery of the substrate spaced at a predetermined interval from an outer edge of a display part to which an oriented film is applied; and a convex portion or/and a concave portion, for preventing the appli ...


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Naoki Kotani, Akio Sebe, Gen Okazaki, Tokuhiko Tamaki: Semiconductor device and method for producing the same. Panasonic Corporation, McDermott Will & Emery, November 25, 2008: US07456448 (4 worldwide citation)

A semiconductor device, including a first MIS-type transistor formed in a first region of a semiconductor region, the first region being of a first conductivity type, the first MIS-type transistor including: a first gate insulating film formed on the first region; a first gate electrode formed on th ...


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Naoki Kotani: Semiconductor device and method for fabricating the same. Panasonic Corporation, McDermott Will & Emery, September 6, 2011: US08013395 (4 worldwide citation)

The distance between a substrate contact portion and an active region in a p-type MIS transistor is greater than the distance between a substrate contact portion and an active region in an n-type MIS transistor. Alternatively, the length of a protruding part of a gate electrode of the p-type MIS tra ...