1
Scott E Hrastar, Issam Nadim Haddad: Systems and methods for dynamic sensor discovery and selection. AirDefense, Fish & Richardson P C, January 29, 2008: US07324804 (22 worldwide citation)

This application is directed to systems and methods for managing wireless network sensors. A plurality of wireless network sensors in the network region are identified. For each of the network sensors in the plurality of wireless network sensors, a designation of primary or secondary with respect to ...


2
Nadim Haddad, Charles N Alcorn, Jonathan Maimon, Leonard R Rockett, Scott Doyle: Method for fabricating resistors within semiconductor integrated circuit devices. BAE Systems Information and Electronic Systems Integration, Daniel J Long, Antony P Ng, Bracewell & Patterson L, April 6, 2004: US06717233 (16 worldwide citation)

A method for fabricating resistors within a semiconductor integrated circuit device is disclosed. A resistor is fabricated by first depositing a passivation layer on a semiconductor substrate having multiple transistors previously formed thereon. Next, a first contact window and a second contact win ...


3
Robert Dockerty, Nadim Haddad, Michael J Hurt, Frederick T Brady: Radiation hardened silicon-on-insulator (SOI) transistor having a body contact. BAE Systems Information and Electronic Systems Integration, Antony P Ng, Bracewell & Patterson L, June 4, 2002: US06399989 (8 worldwide citation)

A radiation hardened silicon-on-insulator transistor is disclosed. A dielectric layer is disposed on a substrate, and a transistor structure is disposed on the dielectric layer. The transistor structure includes a body region, a source region, a drain region, and a gate layer. The body region is for ...


4
Paul A Bernkopf, Frederick T Brady, Nadim Haddad: Apparatus and method for manufacturing a semiconductor circuit. BAE Systems, DeMont & Breyer, July 13, 2004: US06762128 (3 worldwide citation)

A method and an apparatus for manufacturing, via a single fabrication line, circuits that are radiation tolerant and also circuits that are radiation intolerant. When production calls for radiation-tolerant circuits, low-pressure chemical vapor deposition is advantageously used to deposit an electri ...


5
Frederick T Brady, Nadim Haddad, Murty S Polavarapu: Semiconductor device and circuit having low tolerance to ionizing radiation. BAE SYSTEMS Information and Electronic Systems Integration, DeMont & Breyer, August 27, 2002: US06441440 (3 worldwide citation)

Semiconductor devices and integrated circuits that benefit from the advantages of contemporary processing technologies yet are irreparably damaged by ionizing radiation, and methods for making the same. Transistors that are particularly intolerant to ionizing radiation have a gate insulator that inc ...


6
Joseph Yoder, Nadim Haddad: Single event upset immune oscillator circuit. BAE Systems Information and Electronic Systems Integration, Antony P Ng, Bracewell & Patterson L, September 10, 2002: US06448862 (2 worldwide citation)

A single event effect immune oscillator circuit is disclosed. The single event upset immune oscillator circuit includes an odd number of logic circuit blocks connecting in series to provide a continuous pulse signal at an output of the oscillator circuit. Each logic circuit block has a first input, ...


7
Nadim Haddad, Frederick Brady, Jonathon Maimon: Radiation-tolerant integrated circuit device and method for fabricating. Schilmass Co L L C, McAndrews Held & Malloy, March 5, 2013: US08389370 (1 worldwide citation)

An enhanced shallow trench isolation method for fabricating radiation tolerant integrated circuit devices is disclosed. A layer of pad oxide is first deposited on a semiconductor substrate. A layer of pad nitride is then deposited on the pad oxide layer. A trench is defined within the semiconductor ...


8
Robert Dockerty, Nadim Haddad, Michael J Hurt, Frederick T Brady: Radiation hardened silicon-on-insulator (SOI) transistor having a body contact. Lockheed Martin Corporation, Antony P Ng Esq, Bracewell & Patterson, July 25, 2002: US20020096719-A1

A radiation hardened silicon-on-insulator transistor is disclosed. A dielectric layer is disposed on a substrate, and a transistor structure is disposed on the dielectric layer. The transistor structure includes a body region, a source region, a drain region, and a gate layer. The body region is for ...


9
Paul A Bernkopf, Frederick T Brady, Nadim Haddad: Apparatus and method for manufacturing a semiconductor circuit. Demont & Breyer, December 5, 2002: US20020182884-A1

A method and an apparatus for manufacturing, via a single fabrication line, circuits that are radiation tolerant and also circuits that are radiation intolerant. When production calls for radiation-tolerant circuits, low-pressure chemical vapor deposition is advantageously used to deposit an electri ...


10
Nadim Haddad, Frederick Brady, Jonathon Maimon: Method to harden shallow trench isolation against total ionizing dose radiation. Burns Doane Swecker & Mathis, December 15, 2005: US20050275069-A1

An enhanced shallow trench isolation method for fabricating radiation tolerant integrated circuit devices is disclosed. A layer of pad oxide is first deposited on a semiconductor substrate. A layer of pad nitride is then deposited on the pad oxide layer. A trench is defined within the semiconductor ...