1
Yoshioka Kosuke, Kiyohara Tokuzo, Mochida Tetsuji, Kimura Kozo, Ochiai Toshiyuki: Data processing apparatus with buffering between buses. Matsushita Electric, January 17, 2001: EP1069512-A2 (5 worldwide citation)

The local buffers 13-15 connected to the buses 10-12 input and output data in a manner that cancels out the difference between the data transfer speeds of the bus 1 and the buses 10-12, where the data transfer speed of a bus changes in proportion to the bit width of the bus. The data transfer rates ...


2
Tanaka Takaharu, Mochida Tetsuji, Ichiguchi Nobuyuki: (Ja) 矩形領域に対するバーストメモリアクセス方法, (En) Burst memory access method to rectangular area. Matsushita Electric Industrial, Tanaka Takaharu, Mochida Tetsuji, Ichiguchi Nobuyuki, NII Hiromori, November 17, 2005: WO/2005/109205 (5 worldwide citation)

(EN) An information processor is provided with a memory (1), which is a DRAM having a burst mode for burst transferring data of serial column addresses, masters (13-15) for issuing an access request, and a command processing part (11) for converting an access address included in the access request i ...


3
Mochida Tetsuji, Yoshioka Kosuke, Kiyohara Tokuzo: Resource request adjustment device, resource request adjustment method, and computer program. Matsushita Electric, January 8, 2004: JP2004-005589 (4 worldwide citation)

PROBLEM TO BE SOLVED: To provide a resource request adjustment device that manages the quality of services for resource requesting devices which uses pre-fixed priority and without using a relation among the resource requesting devices, other than the priority.SOLUTION: In the resource request adjus ...


4
Yoshioka Kosuke, Kiyohara Tokuzo, Kimura Kozo, Mochida Tetsuji, Ochiai Toshiyuki: Data processor. Matsushita Electric, March 30, 2001: JP2001-084215 (2 worldwide citation)

PROBLEM TO BE SOLVED: To provide high general-purpose properties to be able to cope with the assignment change of bandwidth in every future media processing. SOLUTION: Local buffers 13 to 15 are respectively made to correspond to a plurality of respective buses 10 to 12, and data are respectively in ...


5
Mochida Tetsuji, Kiyohara Tokuzo, Yamada Takashi: (Ja) 低バンド幅で局所集中アクセスを保証する調停装置、調停方法、及び調停装置を含む動画処理装置, (En) Administration device for warranting local concentrated access in low-band width, administration method, and animation processing apparatus including the administration device. Matsushita Electric Industrial, Mochida Tetsuji, Kiyohara Tokuzo, Yamada Takashi, NAKAJIMA Shiro, January 5, 2006: WO/2006/001245 (2 worldwide citation)

(EN) An administration device for administrations between master devices so that the individual master devices may access a shared memory with a predetermined band width. In case a specific master device requests an access of a band width equal to or larger than a previously assigned one, the reques ...


6
Mochida Tetsuji, Nakanishi Ryuta, Tanaka Takaharu: (Ja) アクセス制御装置、アクセス制御集積回路、及びアクセス制御方法, (En) Access control device, access control integrated circuit, and access control method. Matsushita Electric Industrial, Mochida Tetsuji, Nakanishi Ryuta, Tanaka Takaharu, NAKAJIMA Shiro, January 11, 2007: WO/2007/004696 (2 worldwide citation)

(EN) In a device in which a master to guarantee an access at a constant rate and a processor to promptly respond to an access request access a common memory, it is possible to improve the promptness of the processor for the access request while guaranteeing the access of the master at a constant rat ...


7
Mochida Tetsuji, Hirai Makoto, Ochiai Toshiyuki: Dma transfer device and image decoding device. Matsushita Electric, March 23, 2001: JP2001-075917 (2 worldwide citation)

PROBLEM TO BE SOLVED: To easily improve the real time property of a plurality of DMA data transfers whose temporal constraint is server by issuing a DMA request corresponding to a DMA channel of temporally constrained data for transfer simultaneously or with intervals reduced. SOLUTION: Priorities o ...


8
Tanaka Takaharu, Mochida Tetsuji: (Ja) メモリ制御装置及びメモリ制御方法, (En) Memory control apparatus and memory control method. Matsushita Electric Industrial, Tanaka Takaharu, Mochida Tetsuji, MAEDA Hiroshi, December 14, 2006: WO/2006/132006 (2 worldwide citation)

(EN) Access requests issued from access circuits (30,40) are arbitrated by an arbitration circuit (20) to access a storage apparatus (10), while they are arbitrated by an arbitration circuit (21) to access a storage apparatus (11).(JA)  アクセス回路30,40から発行されたアクセス要求を調停回路20で調停して記憶装置10にアクセスする一方、アクセス回路30,40 ...


9
Tanaka Takaharu, Mochida Tetsuji, Ichiguchi Nobuyuki: Burst memory access method to rectangular area. Matsushita Electric, December 27, 2006: EP1736883-A1 (1 worldwide citation)

The information processing device in the present invention includes a memory 1 which is a DRAM featuring a burst mode, and burst-transfers data at successive column addresses, masters (13), (14), and (15) which issue access requests, and a command processing unit (11) which converts an access addres ...


10
Yoshioka Kosuke, Hirai Makoto, Mochida Tetsuji, Oka Hiroyuki, Nishida Hideshi, Kiyohara Tokuzo: Transcoder. Matsushita Electric, June 3, 2004: JP2004-159316 (1 worldwide citation)

PROBLEM TO BE SOLVED: To provide a transcoder in which a hardware quantity is reduced in order for downsizing a device and reducing costs.SOLUTION: The transcoder 100 resizes a motion picture, a collection of images to the motion picture at a first resolution desired by a reproducing device, and out ...