1
Eugene Fitzgerald
Minjoo L Lee, Christopher W Leitz, Eugene A Fitzgerald: Formation of planar strained layers. Massachusetts Institute of Technology, Testa Hurwitz & Thibeault, May 4, 2004: US06730551 (55 worldwide citation)

A structure and a method for forming the structure, the method including forming a compressively strained semiconductor layer, the compressively strained layer having a strain greater than or equal to 0.25%. A tensilely strained semiconductor layer is formed over the compressively strained layer. Th ...


2
Eugene Fitzgerald
Christopher W Leitz, Minjoo L Lee, Eugene A Fitzgerald: Enhancement of P-type metal-oxide-semiconductor field effect transistors. Massachusetts Institute of Technology, Testa Hurwitz & Thibeault, July 12, 2005: US06916727 (9 worldwide citation)

A structure includes a tensile strained layer disposed over a substrate, the tensile strained layer having a first thickness. A compressed layer is disposed between the tensile strained layer and the substrate, the compressed layer having a second thickness. The first and second thicknesses are sele ...


3
Eugene Fitzgerald
Minjoo L Lee, Christopher W Leitz, Eugene A Fitzgerald: Structure and method for a high-speed semiconductor device having a Ge channel layer. Massachusetts Institute of Technology, Goodwin Procter, November 27, 2007: US07301180 (8 worldwide citation)

The invention provides semiconductor structure comprising a strained Ge channel layer, and a gate dielectric disposed over the strained Ge channel layer. In one aspect of the invention, a strained Ge channel MOSFET is provided. The strained Ge channel MOSFET includes a relaxed SiGe virtual substrate ...


4
Eugene Fitzgerald
Minjoo L Lee, Christopher W Leitz, Eugene A Fitzgerald: Structures with planar strained layers. AmberWave Systems Corporation, Goodwin Procter, November 28, 2006: US07141820 (7 worldwide citation)

A structure including a compressively strained semiconductor layer, the compressively strained layer having a strain greater than or equal to 0.25%. A tensilely strained semiconductor layer may be formed over the compressively strained layer. The compressively strained layer is substantially planar, ...


5
Eugene Fitzgerald
Yu Bai, Minjoo L Lee, Eugene A Fitzgerald: Tensile strained GE for electronic and optoelectronic applications. Massachusetts Institute of Technology, Gesmer Updegrove, November 22, 2011: US08063413 (3 worldwide citation)

A semiconductor structure is provided. The semiconductor structure includes one or more III-IV material-based semiconductor layers. A tensile-strained Ge layer is formed on the one or more a III-IV material-based semiconductor layers. The tensile-strained Ge layer is produced through lattice-mismatc ...


6
Eugene Fitzgerald
Minjoo L Lee, Christopher W Leitz, Eugene A Fitzgerald: Formation of planar strained layers. Massachusetts Institute of Technology, Testa Hurwitz & Thibeault, February 6, 2003: US20030025131-A1 (3 worldwide citation)

A structure and a method for forming the structure, the method including forming a compressively strained semiconductor layer, the compressively strained layer having a strain greater than or equal to 0.25%. A tensilely strained semiconductor layer is formed over the compressively strained layer. Th ...


7
Eugene Fitzgerald
Christopher W Leitz, Minjoo L Lee, Eugene A Fitzgerald: Enhancement of p-type metal-oxide-semiconductor field effect transistors. AmberWave Systems Corporation, Testa Hurwitz & Thibeault, December 26, 2002: US20020197803-A1 (1 worldwide citation)

A structure includes a tensile strained layer disposed over a substrate, the tensile strained layer having a first thickness. A compressed layer is disposed between the tensile strained layer and the substrate, the compressed layer having a second thickness. The first and second thicknesses are sele ...


8
Eugene Fitzgerald
Minjoo L Lee, Christopher W Leitz, Eugene A Fitzgerald: Structure and method for a high-speed semiconductor device having a Ge channel layer. Massachusetts Institute of Technology, Goodwin Procter, May 7, 2013: US08436336

The invention provides semiconductor structure comprising a strained Ge channel layer, and a gate dielectric disposed over the strained Ge channel layer. In one aspect of the invention, a strained Ge channel MOSFET is provided. The strained Ge channel MOSFET includes a relaxed SiGe virtual substrate ...


9
Eugene Fitzgerald
Minjoo L Lee, Eugene A Fitzgerald: Method for improving hole mobility enhancement in strained silicon p-type MOSFETS. Massachusetts Institute of Technology, Gauthier & Connors, February 28, 2006: US07005668

A method of forming a MOSFET device is provided. The method includes providing a substrate. The method includes forming on the substrate a relaxed SiGe layer having a Ge content between 0.51 and 0.80. Furthermore, the method includes depositing on the relaxed SiGe layer a ε-Si layer.


10
Eugene Fitzgerald
Minjoo L Lee, Christopher W Leitz, Eugene A Fitzgerald: STRUCTURE AND METHOD FOR A HIGH-SPEED SEMICONDUCTOR DEVICE HAVING A Ge CHANNEL LAYER. Goodwin Procter, June 5, 2008: US20080128747-A1

The invention provides semiconductor structure comprising a strained Ge channel layer, and a gate dielectric disposed over the strained Ge channel layer. In one aspect of the invention, a strained Ge channel MOSFET is provided. The strained Ge channel MOSFET includes a relaxed SiGe virtual substrate ...