1
Michael B Galles, Robert E Newhall: Programmable, distributed network routing. Silicon Graphics Corporation, Sterne Kessler Goldstein & Fox P L L C, February 24, 1998: US05721819 (114 worldwide citation)

A programmable, distributed network routing system and method uses routing tables which are distributed throughout the network. Routing tables are programmed to route packets to the target device by the preferred route. When a packet is injected into the network for delivery to a particular node eac ...


2
Randal S Passint, Greg Thorson, Michael B Galles: Hybrid hypercube/torus architecture. Silicon Graphics, Schwegman Lundberg Woessner & Kluth P A, May 8, 2001: US06230252 (92 worldwide citation)

A scalable multiprocessor system includes processing element nodes. A scalable interconnect network includes physical communication links interconnecting the processing element nodes in an n-dimensional topology, and routers for routing messages between the processing element nodes on the physical c ...


3
Randal S Passint, Michael B Galles, Greg Thorson: Router table lookup mechanism. Cray Research, Schwegman Lundberg Woessner and Kluth P A, October 19, 1999: US05970232 (89 worldwide citation)

A multiprocessor computer system includes processing element nodes interconnected by physical communication links in a n-dimensional topology, which includes at least two global partitions. Routers route messages between processing element nodes and include ports for receiving and sending messages, ...


4
Michael B Galles, Martin M Deneroff: System and method of implementing read resources to maintain cache coherency in a multiprocessor environment permitting split transactions. Silicon Graphics, Sterne Kessler Goldstein & Fox, April 2, 1996: US05504874 (78 worldwide citation)

A multiprocessing system that uses read resources to track cache coherent split transactions on its main system bus. Pending reads are tracked by being associated with read resources. When a read request is issued, it occupies the first available read resource. A pending read request will occupy a r ...


5
Zubin D Dittia, William N Eatherton, John Andrew Fingerhut, Michael B Galles, Jonathan S Turner: Accumulating and distributing flow control information via update messages and piggybacked flow control information in other messages in a packet switching system. Cisco Technology, The Law Offices of Kirk D Williams, November 25, 2003: US06654342 (71 worldwide citation)

Methods and apparatus are disclosed for accumulating and distributing flow control information via update messages and piggybacked flow control information in other messages. One implementation operates using at least two techniques. Using a first technique, for every packet entering the switching s ...


6
Randal S Passint, Greg Thorson, Michael B Galles: Virtual channel assignment in large torus systems. Cray Research, Schwegman Lundberg Woessner & Kluth P A, August 8, 2000: US06101181 (64 worldwide citation)

A multiprocessor computer system includes processing element nodes interconnected by physical communication links. Routers route messages between processing element nodes on the physical communication links. Each router includes input ports for receiving messages, output ports for sending messages f ...


7
Robert E Newhall, Michael B Galles: System and method for network exploration and access. Silicon Graphics, Sterne Kessler Goldstein & Fox P L L C, October 28, 1997: US05682479 (57 worldwide citation)

A vector routing scheme provides an effective method for exploring nodes in a multi-processor computer system consisting of an inter-connection network of nodes connected by edges. The object of this exploration is to determine the configuration of the network to facilitate internode communications. ...


8
Michael B Galles, Daniel E Lenoski: Hierarchical fat hypercube architecture for parallel processing systems. Silicon Graphics, Sterne Kessler Goldstein & Fox P L L C, September 16, 1997: US05669008 (25 worldwide citation)

A hierarchical fat hypercube topology provides an infrastructure for implementing a multi-processor system at a plurality of levels. A first level is comprised of a plurality of n-dimensional hypercubes. This plurality of n-dimensional hypercubes is interconnected at a second level utilizing an m-di ...


9
Jonathan S Turner, Michael B Galles: Route scheduling of packet streams to achieve bounded delay in a packet switching system. Cisco Technology, The Law Offices of Kirk D Williams, September 7, 2004: US06788689 (22 worldwide citation)

Connection distributors are used to route packets corresponding to multiple streams of packets through a packet switching system. During each time slot, one packet is typically sent from each packet stream. During the configuration of a packet stream, a time slot and primary route is determined for ...


10
Ronald E Nikel, Daniel E Lenoski, Michael B Galles: System and method for the synchronous transmission of data in a communication network utilizing a source clock signal to latch serial data into first registers and a handshake signal to latch parallel data into second registers. Silicon Graphics, Sterne Kessler Goldstein & Fox P L L C, June 16, 1998: US05768529 (15 worldwide citation)

A system and method for transmitting data, using a source synchronous clocking scheme, over a communication (or data) link. A source synchronous driver (SSD) receives a micropacket of parallel data and serializes this data for transfer over the communication link. The serial data is transferred onto ...