1
Masue Shiba, Shinichi Kawamura: Arithmetic method and apparatus and crypto processing apparatus for performing multiple types of cryptography. Kabushiki Kaisha Toshiba, Finnegan Henderson Farabow Garrett & Dunner L, October 2, 2007: US07277540 (60 worldwide citation)

An arithmetic apparatus for performing a long product-sum operation includes an integer unit arithmetic circuit, a finite field GF(2^m) based unit arithmetic circuit logically adjacent to the integer unit arithmetic circuit, a selector for selecting the integer unit arithmetic circuit or the finite ...


2
Masue Shiba, Shigeharu Nakata: Priority encoder. Kabushiki Kaisha Toshiba, Finnegan Henderson Farabow Garrett & Dunner, April 23, 1996: US05511222 (18 worldwide citation)

A priority encoder-includes an encoder for coding an input consisting of a plurality of bits, selectors, respectively provided for bit input terminals of the encoder, for respectively receiving corresponding ones of a plurality of bits of an operand input, each of the selectors including a switch ci ...


3
Masue Shiba, Shigeharu Nakata: ROM burst transfer continuous read-out extension method and a microcomputer system with a built-in ROM using this method. Kabushiki Kaisha Toshiba, Finnegan Henderson Farabow Garrett & Dunner L, August 27, 1996: US05550996 (3 worldwide citation)

A microcomputer with a built-in ROM for a burst transfer method has a ROM divided into blocks, for reading data by being supplied with an address, a first control circuit for supplying the address to the ROM, an adder for adding a specific address value to the address and outputting an added address ...


4
Nobutaka Kitagawa, Shigeharu Nakata, Yasuhiro Ishii, Masue Shiba: Semiconductor integrated circuit device comprising memory area in which structurally different memory cells are included. Kabushiki Kaisha Toshiba, Finnegan Henderson Farabow Garrett & Dunner, May 30, 1995: US05420817 (2 worldwide citation)

The same bit lines are used in common to a fixed data cell array and a memory cell array. The output section of the fixed data cell array is connected to an output circuit, just like the output section of the memory cell array. In response to signal CON supplied from a computer, an array selector ex ...


5
Michiyo Ikegami, Masue Shiba, Hidehisa Takamizawa, Masanobu Koike: Security countermeasure function evaluation program. Kabushiki Kaisha Toshiba, Toshiba Solutions Corporation, Oblon Spivak McClelland Maier & Neustadt L, March 26, 2013: US08407801 (1 worldwide citation)

In a security countermeasure function evaluation apparatus, an estimator operates an input unit, whereby an evaluation point calculation unit makes an evaluation as to whether each item of countermeasure information representing a security countermeasure function in detail satisfies each item of suf ...


6
Masue Shiba, Koji Yura: Conditional-access terminal device and method. Finnegan Henderson Farabow Garrett & Dunner, September 22, 2005: US20050209970-A1

According to a first aspect of the present invention, a conditional-access program can be updated without replacing a conditional-access large scale integrated circuit (LSI) or a conditional-access terminal device main-body. A conditional-access terminal device reads and decrypts an encrypted condit ...


7
Michiyo IKEGAMI, Masue Shiba, Hidehisa Takamizawa, Masanobu Koike: Security countermeasure function evaluation program. December 8, 2011: US20110302657-A1

In a security countermeasure function evaluation apparatus, an estimator operates an input unit, whereby an evaluation point calculation unit makes an evaluation as to whether each item of countermeasure information representing a security countermeasure function in detail satisfies each item of suf ...