1
Shigeki Tomishima, Masatoshi Ishikawa, Tsukasa Ooishi: Memory system for synchronized and high speed data transfer. Mitsubishi Denki Kabushiki Kaisha, McDermott Will & Emery, November 12, 2002: US06480946 (74 worldwide citation)

A plurality of memory devices are connected parallel to each other commonly to signal lines extending in one direction, and signals are transmitted in one direction along the signal lines. The sum of the time of signal propagation from a transmission unit to a selected memory device and the time of ...


2
Tsukasa Ooishi, Takaharu Tsuji, Masatoshi Ishikawa, Hideto Hidaka, Hiroshi Kato: Semiconductor device with reduced current consumption in standby state. Mitsubishi Denki Kabushiki Kaisha, McDermott Will & Emery, July 22, 2003: US06597617 (68 worldwide citation)

A logic portion outputs to a DRAM portion a start address and an end address indicating a memory region where data to be stored is present prior to transition to power down mode having reduced current consumption. In the power down mode, a refresh control unit holds the start address and the end add ...


3
Tsukasa Ooishi, Masatoshi Ishikawa, Shigeki Tomishima: Synchronous semiconductor memory device allowing control of operation mode in accordance with operation conditions of a system. Mitsubishi Denki Kabushiki Kaisha, McDermott Will & Emery, August 20, 2002: US06438066 (51 worldwide citation)

For a write operation, a synchronous semiconductor memory device in a single-data-rate SDRAM operation mode selects a memory cell column in accordance with a column select signal produced from a write clock produced in synchronization with an external clock signal without shifting the write clock. I ...


4
Tsukasa Ooishi, Masatoshi Ishikawa, Shigeki Tomishima: Synchronous semiconductor memory device allowing control of operation mode in accordance with operation conditions of a system. Mitsubishi Denki Kabushiki Kaisha, McDermott Will & Emery, September 9, 2003: US06618319 (50 worldwide citation)

For a write operation, a synchronous semiconductor memory device in a single-data-rate SDRAM operation mode selects a memory cell column in accordance with a column select signal produced from a write clock produced in synchronization with an external clock signal without shifting the write clock. I ...


5
Takao Hidano, Masatoshi Ishikawa: Cartridge library apparatus for handling a number of cartridges in one operation. Hitachi, Meltzer Lippe Goldstein et al, August 15, 1995: US05442500 (45 worldwide citation)

A cartridge library apparatus adapted to large number of cartridges in one operation, comprising magazines each of which can be loaded with the large number of cartridges, and a magazine rack in which the magazine is detachably accommodated. The magazine is provided with erroneous insertion restrain ...


6
Masatoshi Ishikawa, Kozo Fujita, Shigeyuki Kobata: Tape changer for loading and unloading a magazine of magnetic tape cartridges. Hitachi, Fay Sharpe Beall Fagan Minnich & McKee, June 4, 1991: US05021902 (43 worldwide citation)

A magazine in which a plurality of cartridges are contained as vertically moved stepwise by a distance separating two successive ones of the cartridges. The lift has a plurality of lift steps alternately engaged by a latching member. A rotary disk having two pins on its face is arranged adjacent the ...


7
Tsukasa Ooishi, Masatoshi Ishikawa, Shigeki Tomishima: Synchronous semiconductor memory device allowing control of operation mode in accordance with operation conditions of a system. Mitsubishi Denki Kabushiki Kaisha, McDermott Will & Emery, September 26, 2000: US06125078 (43 worldwide citation)

For a write operation, a synchronous semiconductor memory device in a single-data-rate SDRAM operation mode selects a memory cell column in accordance with a column select signal produced from a write clock produced in synchronization with an external clock signal without shifting the write clock. I ...


8
Takaya Ishigaki, Masatoshi Ishikawa, Takashi Kamiya, Shunji Itakura, Yuji Aiba, Masanori Yamamoto: Ceramic capacitor. TDK Corporation, Oblon Spivak McClelland Maier & Neustadt P C, February 20, 2001: US06191933 (33 worldwide citation)

The present invention relates to a ceramic capacitor having metal plate terminals that absorb thermal stress and mechanical stress caused by flexure of the substrate. A ceramic capacitor element is provided with terminal electrodes at the two side end surfaces facing opposite each other. The metal p ...


9
Takaya Ishigaki, Masatoshi Ishikawa, Takashi Kamiya, Shunji Itakura, Yuji Aiba, Masanori Yamamoto: Ceramic capacitor. TDK Corporation, Oblon Spivak McClelland Maier & Neustadt P C, October 30, 2001: US06310759 (31 worldwide citation)

The present invention relates to a ceramic capacitor having metal plate terminals that absorb thermal stress and mechanical stress caused by flexure of the substrate. A ceramic capacitor element is provided with terminal electrodes at the two side end surfaces facing opposite each other. The metal p ...


10
Tsukasa Ooishi, Masatoshi Ishikawa: Semiconductor integrated circuit device including logic gate that attains reduction of power consumption and high-speed operation. Mitsubishi Denki Kabushiki Kaisha, McDermott Will & Emery, September 18, 2001: US06292015 (30 worldwide citation)

A semiconductor integrated circuit device has a hierarchical power supply system for a logic circuit. Inverters are provided with power supply from a main power supply line and a sub-power supply line of a higher potential and a main ground line and a sub-ground line of a lower potential. An interna ...



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