1
Bryan P Black, Marvin A Denman Jr, Seungyoon Peter Song: Data processor with branch target address cache and method of operation. Motorola, September 8, 1998: US05805877 (40 worldwide citation)

A data processor (10) has a BTAC (48) storing a number of recently encountered fetch address-target address pairs. A branch unit (20) generates a fetch address that depends upon a condition precedent and a received branch instruction. After executing each branch instruction, the branch unit predicts ...


2
Marvin A Denman Jr, John M Young, Mitch K Alsup: Circuit and method for accumulating partial products of a single, double or mixed precision multiplication. Motorola, Robert L King, January 9, 1990: US04893268 (26 worldwide citation)

A circuit for use in conjunction with a multiplier receives a portion of completed product bits and a portion of sum and carry bits which, when accumulated, provide a complete output product operand. The circuit is adaptable for use with input operands having single or double precision data formats. ...


3
Marvin A Denman Jr: Data processor for simultaneously searching two fields of the rename buffer having first and second most recently allogated bits. Motorola, Lee E Chastain, February 20, 1996: US05493669 (15 worldwide citation)

A data processor has a plurality of execution units (12), a rename buffer (14) coupled to at least one of the execution units and a plurality of architectural registers (16) coupled to at least one execution unit and to the rename buffer. The rename buffer periodically receives and stores the result ...