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Bryan P Black, Marvin A Denman: Method of operating a data processor with rapid address comparison for data forwarding. Motorola, Lee E Chastain, March 18, 1997: US05613081 (5 worldwide citation)

A data processor (10) has an execution unit (18, 20) for generating the address of each requested data double-word. The data processor fetches the entire memory line, four double-words of data, containing the requested double-word when the requested double-word is not found in the data processor's m ...


12
Bryan Black, Marvin A Denman, Lee E Eisen, Robert T Golla, Albert J Loper Jr, Soummya Mallick, Russell Adley Reininger: Method and system for recording noneffective instructions within a data processing system. International Business Machines Corporation, Motorola, Mark E McBurney, Brian F Russell, Andrew J Dillon, February 10, 1998: US05717587 (2 worldwide citation)

A method and system are disclosed for processing instructions within a data processing system including a processor having a plurality of execution units. According to the method of the present invention, a number of instructions stored within a memory within the data processing system are retrieved ...


13
Marvin A Denman, Dennis K Ma, Stephen David Glaser: Technique for scaling the bandwidth of a processing element to match the bandwidth of an interconnect. NVIDIA Corporation, Artegis Law Group, April 18, 2017: US09626320

A transmitter is configured to scale up a low bandwidth delivered by a first processing element to match a higher bandwidth associated with an interconnect. A receiver is configured to scale down the high bandwidth delivered by the interconnect to match the lower bandwidth associated with a second p ...


14
James D Dundas, Marvin A Denman: Generating predicted branch target address from two entries storing portions of target address based on static/dynamic indicator of branch instruction type. Advanced Micro Devices, Williams Morgan P C, April 8, 2014: US08694759

A method and apparatus to utilize a branch prediction scheme that limits the expenditure of power and the area consumed caused by branch prediction schemes is provided. The method includes accessing a first entry and a second entry of the data structure, wherein each entry stores a portion of a pred ...


15
Jr Marvin A Denman: A data processor with most recently allocated bit and method of operation. Motorola, LU LIYING, November 23, 1994: CN94102516

A data processor has a plurality of execution units (12), a rename buffer (14) coupled to at least one of the execution units and a plurality of architectural registers (16) coupled to at least one execution unit and to the rename buffer. The rename buffer periodically receives and stores the result ...


16
David P Burgess, Marvin A Denman, Milton M Jr Hood: Data processor with execution unit for performing load instructions and method of operation. Motorola, LU LIYING, March 12, 1997: CN95106550

The disclosed data processor (10) dispatches load/store multiple and load/store string instructions to a load/store unit (28) as a sequence of simple load or store instructions. The sequencer unit (18) assigns an entry of a rename buffer (34) to which the load/store unit writes back the data of each ...


17
James D Dundas, Marvin A Denman: Branch prediction scheme utilizing partial-sized targets. May 17, 2012: US20120124347-A1

A method and apparatus to utilize a branch prediction scheme that limits the expenditure of power and the area consumed caused by branch prediction schemes is provided. The method includes accessing a first entry and a second entry of the data structure, wherein each entry stores a portion of a pred ...


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