1
Martin Perner: Integrated memory and method for testing and repairing the integrated memory. Infineon Technologies, Laurence A Greenberg, Werner H Stemer, Ralph E Locher, July 8, 2003: US06590816 (142 worldwide citation)

The integrated memory has memory cells in a memory cell block having a plurality of column lines and a plurality of row lines. The row lines include regular row lines and redundant row lines. In the event of a read access to a current row line, a self-test unit checks the correctness of the memory c ...


2
Martin Perner: Integrated dynamic memory and operating method. Infineon Technologies, Laurence A Greenberg, Werner H Stemer, Gregory L Mayback, May 4, 2004: US06731552 (49 worldwide citation)

An integrated dynamic memory includes a memory cell array having memory cells for storing a charge corresponding to an information bit. The memory cell array has a regular cell area with regular memory cells, a first test cell area with first test cells and a second test cell area with second test c ...


3
Martin Perner: Integrated dynamic memory and operating method. Infineon Technologies, Laurence A Greenberg, Werner H Stemer, Ralph E Locher, September 6, 2005: US06940774 (18 worldwide citation)

An integrated dynamic memory includes a memory cell array having memory cells for storing a charge corresponding to an information bit. The memory cell array has a regular cell area with regular memory cells, a first test cell area with first test cells and a second test cell area with second test c ...


4
Martin Perner: Memory module and method for operating a memory module. Infineon Technologies, Slater & Matsil L, April 10, 2007: US07202545 (12 worldwide citation)

A memory module has an electronic printed circuit board and a plurality of semiconductor memory chips. A series circuit of the semiconductor memory chips is formed with the aid of two leads that can be driven by external contacts of the printed circuit board, and with the aid of connection lines bet ...


5
Martin Perner: Method and device for determining an operating temperature of a semiconductor component. Infineon Technologies, Withrow & Terranova PLLC, February 17, 2004: US06694282 (11 worldwide citation)

A method and a device determine an operating temperature of a semiconductor component during operation, wherein the semiconductor component has a PROM memory area which can be read from the outside. The device further has a programming device for programming the PROM memory area of the semiconductor ...


6
Martin Perner, Thorsten Bucksch: Inputting and outputting operating parameters for an integrated semiconductor memory device. Infineon Technologies, Edell Shapiro & Finnan, February 12, 2008: US07330378 (8 worldwide citation)

An integrated semiconductor memory device includes a control circuit with a mode register to store operating parameters, as well as further registers to store further operating parameters. An operating parameter is selectively written to or read from one of the registers for storage of an operating ...


7
Martin Perner: Semiconductor circuit and method for testing, monitoring and application-near setting of a semiconductor circuit. Infineon Technologies, Edell Shapiro & Finnan, July 24, 2007: US07249301 (6 worldwide citation)

A semiconductor circuit can have a standard interface for external data, address and/or command interchange in normal operation and a further test interface provided for a test operation with a semiconductor component and with a BIST unit (built-in self-test) assigned to the semiconductor component. ...


8
Martin Perner: Circuit and method for evaluating and controlling a refresh rate of memory cells of a dynamic memory. Infineon Technologies, Edell Shapiro & Finnan, June 6, 2006: US07057961 (5 worldwide citation)

A circuit for controlling a refresh rate of memory cells of a dynamic memory includes a control circuit for controlling an access to memory cells of the dynamic memory. A memory circuit can be driven by the control circuit and stores a time information item with regard to an access to a memory cell ...


9
Martin Perner: Electronic memory apparatus and method for operating an electronic memory apparatus. Infineon Technologies, Slater & Matsil L, July 22, 2008: US07403440 (4 worldwide citation)

An electronic memory apparatus has a plurality of memory devices, a plurality of temperature sensors and a control unit. The memory devices each have a multiplicity of nonvolatile memory cells that are refreshed during operation of the electronic memory apparatus. The control unit passes a same peri ...


10
Martin Perner: Sheet-like electrooptical component, light-guide configuration for serial, bidirectional signal transmission and optical printed circuit board. Infineon Technologies, Laurence A Greenberg, Werner H Stemer, Gregory L Mayback, January 25, 2005: US06847669 (4 worldwide citation)

A flat or sheet-like electrooptical component for sending and receiving electrical and optical signals includes a central emission region with at least one light-emitting device for sending out optical signals. A sensor region is arranged around the emission region, and at least one device for sensi ...