1
James Y Cho, James B Keller, Mark D Hayter: Memory controller with programmable configuration. Broadcom Corporation, Garlick Harrison & Markison, April 5, 2005: US06877076 (193 worldwide citation)

A memory controller provides programmable flexibility, via one or more configuration registers, for the configuration of the memory. The memory may be optimized for a given application by programming the configuration registers. For example, in one embodiment, the portion of the address of a memory ...


2
James Y Cho, James B Keller, Mark D Hayter: Memory controller with programmable configuration. Broadcom Corporation, Lawrence J Merkel, Meyertons Hood Kivlin Kowert & Goetzel P C, September 23, 2003: US06625685 (120 worldwide citation)

A memory controller provides programmable flexibility, via one or more configuration registers, for the configuration of the memory. The memory may be optimized for a given application by programming the configuration registers. For example, in one embodiment, the portion of the address of a memory ...


3
Mark D Hayter, Joseph B Rowlands, James Y Cho: System on a chip for networking. Broadcom Corporation, Lawrence J Merkel, July 20, 2004: US06766389 (113 worldwide citation)

A system on a chip for network devices. In one implementation, the system on a chip may include (integrated onto a single integrated circuit), a processor and one or more I/O devices for networking applications. For example, the I/O devices may include one or more network interface circuits for coup ...


4
Mark D Hayter, Joseph B Rowlands: Source controlled cache allocation. Broadcom Corporation, Lawrence J Merkel, Meyertons Hood Kivlin Kowert & Goetzel P C, June 3, 2003: US06574708 (39 worldwide citation)

A cache is coupled to receive an access which includes a cache allocate indication. If the access is a miss in the cache, the cache either allocates a cache block storage location to store the cache block addressed by the access or does not allocate a cache block storage location in response to the ...


5
Dominic Go, Mark D Hayter, Zongjian Chen, Ruchi Wadhawan: Unified DMA. P A Semi, Lawrence J Merkel, Meyertons Hood Kivlin Kowert & Goetzel P C, February 24, 2009: US07496695 (34 worldwide citation)

In one embodiment, an apparatus comprises a first interface circuit, a direct memory access (DMA) controller coupled to the first interface circuit, and a host coupled to the DMA controller. The first interface circuit is configured to communicate on an interface according to a protocol. The host co ...


6
James B Keller, Chun H Ning, Kwong Tak A Chui, Mark D Hayter: Adaptive retry mechanism. Broadcom Corporation, Lawrence J Merkel, Meyertons Hood Kivlin Kowert & Goetzel P C, October 14, 2003: US06633936 (32 worldwide citation)

An adaptive retry mechanism may record latencies of recent transactions (e.g. the first data transfer latency), and may select a retry latency from two or more retry latencies. The retry latency may be used for a transaction, and may specify a point in time during the transaction at which the transa ...


7
Mark D Hayter, Joseph B Rowlands, James Y Cho: System on a chip for networking. Broadcom Corporation, Garlick Harrison & Markison, August 26, 2008: US07418534 (31 worldwide citation)

A system on a chip for network devices. In one implementation, the system on a chip may include (integrated onto a single integrated circuit), a processor and one or more I/O devices for networking applications. For example, the I/O devices may include one or more network interface circuits for coup ...


8
Mark D Hayter, Joseph B Rowlands, James Y Cho: System on a chip for networking. Broadcom Corporation, Garlick Harrison & Markison, August 2, 2011: US07991922 (29 worldwide citation)

A system on a chip for network devices. In one implementation, the system on a chip may include (integrated onto a single integrated circuit), a processor and one or more I/O devices for networking applications. For example, the I/O devices may include one or more network interface circuits for coup ...


9
Kwong Tak A Chui, Shun Wai Go, Mark D Hayter, Chun H Ning, Amy K Silveria: Tracking a non-posted writes in a system using a storage location to store a write response indicator when the non-posted write has reached a target device. Broadcom Corporation, Garlick Harrison & Markison, February 21, 2006: US07003615 (27 worldwide citation)

An apparatus includes a storage location and a write monitor circuit coupled to the storage location. The storage location is configured to store a write response indicator which is capable of indicating a reception of at least one write response. Each write response indicates that a corresponding w ...


10
Dominic Go, Mark D Hayter, Zongjian Chen, Ruchi Wadhawan: DMA controller configured to process control descriptors and transfer descriptors. Apple, Lawrence J Merkel, Meyertons Hood Kivlin Kowert & Goetzel P C, March 16, 2010: US07680963 (18 worldwide citation)

In one embodiment, an apparatus comprises a first interface circuit, a direct memory access (DMA) controller coupled to the first interface circuit, and a host coupled to the DMA controller. The first interface circuit is configured to communicate on an interface according to a protocol. The host co ...