1
Toshiharu Furukawa, Mark Charles Hakey, Steven John Holmes, David Vaclav Horak, Charles William Koburger III, Peter H Mitchell: Method for forming quadruple density sidewall image transfer (SIT) structures. International Business Machines Corporation, Joan Pennington, April 5, 2005: US06875703 (182 worldwide citation)

A method is provided for forming a quadruple density sidewall image transfer (SIT) structure. Oxide spacers are formed on opposite sidewalls of a first mandrel. The oxide spacers form a second mandrel. Then sidewall spacers are formed on opposite sidewalls of the oxide spacers forming the second man ...


2
Toshiharu Furukawa, Mark Charles Hakey, Steven J Holmes, David V Horak, Charles W Koburger III, Chung Hon Lam: Methods for forming uniform lithographic features. International Business Machines Corporation, Keusey Tutunjian & Bitetto P C, April 1, 2008: US07351648 (118 worldwide citation)

Methods for fabricating a semiconductor device include forming a first layer on an underlying layer, forming a hardmask on the first layer, and patterning holes through the hardmask and first layer. An overhang is formed extending over sides of the holes. A conformal layer is deposited over the over ...


3
David Vaclav Horak, Toshiharu Furukawa, Steven John Holmes, Mark Charles Hakey, William Hsioh Lien Ma, Jack Allan Mandelman: Trench storage dram cell including a step transfer device. International Business Machines, Pollock Vande Sande & Priddy, November 3, 1998: US05831301 (27 worldwide citation)

A memory cell including a substrate, at least one deep trench capacitor in the substrate, at least one FET in the substrate disposed over at least a portion of the at least one deep trench capacitor, and at least one isolation region in the substrate surrounding the at least one FET and having a gre ...


4
Toshiharu Furukawa, Mark Charles Hakey, Steven John Holmes, David Vaclav Horak, Edward Joseph Nowak: FET with T-shaped gate. International Business Machines Corporation, Anthony J Canale, May 10, 2005: US06891235 (25 worldwide citation)

An FET has a T-shaped gate. The FET has a halo diffusion self-aligned to the bottom portion of the T and an extension diffusion self aligned to the top portion. The halo is thereby separated from the extension implant, and this provides significant advantages. The top and bottom portions of the T-sh ...


5
Toshiharu Furukawa, Mark Charles Hakey, Steven J Holmes, David V Horak, Charles William Koburger III, Chung Hon Lam: Layout and process to contact sub-lithographic structures. International Business Machines Corporation, Keusey Tutunjian & Bitetto P C, Mark Wardas, April 1, 2008: US07351666 (24 worldwide citation)

An integrated circuit and method for fabrication includes first and second structures, each including a set of sub-lithographic lines, and contact landing segments connected to at least one of the sub-lithographic lines at an end portion. The first and second structures are nested such that the sub- ...


6
Toshiharu Furukawa, Mark Charles Hakey, David Vaclav Horak, Charles William Koburger III, Mark Eliot Masters, Peter H Mitchell, Stanislav Polonsky: Integrated circuit chip utilizing carbon nanotube composite interconnection vias. International Business Machines Corporation, Roy W Truelson, November 14, 2006: US07135773 (23 worldwide citation)

Conductive paths in an integrated circuit are formed using multiple undifferentiated carbon nanotubes embedded in a conductive metal, which is preferably copper. Preferably, conductive paths include vias running between conductive layers. Preferably, composite vias are formed by forming a metal cata ...


7
Toshiharu Furukawa, Mark Charles Hakey, Steven John Holmes, David Vaclav Horak, Charles William Koburger III, Peter H Mitchell, Larry Alan Nesbit: Selective synthesis of semiconducting carbon nanotubes. International Business Machines Corporation, Wood Herron & Evans, May 2, 2006: US07038299 (19 worldwide citation)

Methods for selecting semiconducting carbon nanotubes from a random collection of conducting and semiconducting carbon nanotubes synthesized on multiple synthesis sites carried by a substrate and structures formed thereby. After an initial growth stage, synthesis sites bearing conducting carbon nano ...


8
Toshiharu Furukawa, Mark Charles Hakey, Steven John Holmes, David Vaclav Horak, Charles William Koburger III, Peter H Mitchell, Larry Alan Nesbit: Vertical nanotube semiconductor device structures and methods of forming the same. International Business Machines Corporation, Wood Herron & Evans, April 6, 2010: US07691720 (15 worldwide citation)

Vertical device structures incorporating at least one nanotube and methods for fabricating such device structures by chemical vapor deposition. Each nanotube is grown by chemical vapor deposition catalyzed by a catalyst pad and encased in a coating of a dielectric material. Vertical field effect tra ...


9
Toshiharu Furukawa, Mark Charles Hakey, Steven John Holmes, David Vaclav Hotak, Charles William Koburger III, Peter H Mitchell, Larry Alan Nesbit: Methods and structures for promoting stable synthesis of carbon nanotubes. International Business Machines Corporation, Wood Herron & Evans, May 20, 2008: US07374793 (15 worldwide citation)

A method for synthesizing carbon nanotubes and structure formed thereby. The method includes forming carbon nanotubes on a plurality of synthesis sites supported by a first substrate, interrupting nanotube synthesis, mounting a free end of each carbon nanotube to a second substrate, and removing the ...


10
Toshiharu Furukawa, Mark Charles Hakey, David Vaclav Horak, Charles William Koburger III, Mark Eliot Masters, Peter H Mitchell: Dual gated finfet gain cell. International Business Machines Corporation, Wood Herron & Evans, November 29, 2005: US06970372 (15 worldwide citation)

A memory gain cell for a memory circuit, a memory circuit formed from multiple memory gain cells, and methods of fabricating such memory gain cells and memory circuits. The memory gain cell includes a storage device capable of holding a stored electrical charge, a write device, and a read device. Th ...



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