1
William Phillips, Mario Paparo: High-side-driver gate drive circuit. SGS Thomson Microelectronics, David V Carlson, Theodore E Galanthay, Lisa K Jorgenson, August 18, 1998: US05796276 (60 worldwide citation)

A high-side gate driving circuit, where a current-mode differential error amplifier is used to regulate the current sourced to the gate. A current path is provided from the gate to the source of the power device, and a constant current is provided to the gate. A variable current source is also provi ...


2
Giovanni Caliā€², Mario Paparo, Roberto Pelleriti: Low drop BiCMOS/CMOS voltage regulator. STMicroelectronics S r l, Theodore E Galanthay, Robert Iannucci, Seed IP Law Group PLLC, July 24, 2001: US06265856 (20 worldwide citation)

Presented is a low-drop type of voltage regulator formed with BiCMOS/CMOS technology. The regulator includes an input terminal that receives a stable voltage reference connected to one input of an operational amplifier through a switch controlled by a power-on enable signal. A supply voltage referen ...


3
Mario Paparo, Raffaele Zambrano: Smart power integrated circuit with dynamic isolation. December 12, 1995: US05475273 (10 worldwide citation)

A smart power integrated circuit with dynamic isolation. A P-type isolation region surrounds the small signal devices (npn bipolar transistors and possibly other devices). This isolation region is held at ground in normal operation; but one or more pilot circuits continually monitor the collector vo ...


4
Sergio Palara, Mario Paparo, Roberto Pellicano: Integrated structure with active and passive components enclosed in insulating pockets and operating at higher than the breakdown voltage between each component and the pocket containing it. SGS Thomson Microelectronics S r l, Sixbey Friedman Leedom & Ferguson, August 7, 1990: US04947231 (10 worldwide citation)

The integrated structure consists of circuit components made by diffusion of dopes in a semiconductor substrate. Each of said components is situated inside a respective insulating pocket to which is applied a voltage falling between the minimum and the maximum voltage applied to the components conta ...


5
William A Phillips, Mario Paparo, Piero Capocelli: Delay circuit and method. STMicroeletronics, Theodore E Galanthay, Lisa K Jorgenson, Renee M Larson, August 10, 1999: US05936451 (6 worldwide citation)

A reduced area delay circuit and method are disclosed. The delay circuit uses a constant current source and a constant current drain to charge and discharge a capacitor and thus control the delay time of the delay circuit. The constant current source and drain can be implemented using current mirror ...


6
Michele Zisa, Massimiliano Belluso, Mario Paparo: Bootstrap circuit for driving a power MOS transistor. Consorzio Per La Ricerca Sulla Microelettronica Nel Mezzogiorno, SGS Thomson Microelectronics s r l, Felsman Bradley Gunter & Dillon, January 10, 1995: US05381044 (6 worldwide citation)

In accordance with the present invention, the above and other objects and advantages are obtained with a bootstrap circuit for a power MOS transistor in a high side configuration. Such circuit includes a first capacitor chargeable to a first voltage which is a function of the supply voltage of the p ...


7
Mario Paparo, Natale Aiello: High current MOS transistor bridge structure. SGS Thompson Microelectronics, Consorzio per la Ricerca Sulla Microelectronics nel Mezzogiorno, Felsman Bradley Gunter & Dillon, September 12, 1995: US05449936 (5 worldwide citation)

A high current MOS transistor integrated bridge structure includes at least two arms, each having a first and a second MOS transistor. The structure is formed on an N++ substrate forming a positive potential output terminal, and an N-type epitaxial layer. For each first transistor, an L shaped regio ...


8
Mario Paparo, Sergio Palara: Monolithic integrated structure for a two-stage driving system with level translator circuit component of the driving signal for power transistors. SGS Thomson Microelectronics S r l, Sixbey Friedman Leedom & Ferguson, December 10, 1991: US05072278 (5 worldwide citation)

The monolithic integrated structure comprises a semiconductor substrate, a superimposed first epitaxial stratum having characteristics such as to withstand a high supply voltage applied to the driving system and a first and a second isolation pocket which may be connected to a high voltage and to gr ...


9
Mario Paparo, Natale Aiello: Integrated bridge device for optimizing conduction power losses. Consorzio per la Ricerca Sulla Microelettronica Nel Mezzogiorno, Felsman Bradley Gunter & Dillon, August 22, 1995: US05444291 (4 worldwide citation)

An integrated bridge device includes at least two arms, each of which is formed of a first and second diode connected transistor in series. The device is formed in an N+ substrate, which forms a positive output terminal. N- and N type epitaxial layers are formed over the substrate, and P and P+ regi ...


10
Santo Puzzolo, Raffaele Zambrano, Mario Paparo: Integrated emitter switching configuration using bipolar transistors. SGS Thomson Microelectronics S r l, Consorzio Per La Ricerca Sulla Microelettronica Nel Mezzogiorno, December 27, 1994: US05376821 (4 worldwide citation)

A bipolar power transistor and a low voltage bipolar transistor are combined in an emitter switching or a semibridge configuration in an integrated structure. In a version with non-isolated components, the components of the structure are totally or partially superimposed on each other, partly in a f ...