1
Horng Chih Lin, Liang Po Chen, Hsiao Yi Lin, Chun Yen Chang: Method for fabricating thin-film transistor with bottom-gate or dual-gate configuration. National Science Council, Fish & Richardson P C, August 19, 1997: US05658806 (98 worldwide citation)

A method for fabricating a self-aligned thin-film transistor, in accordance with the present invention, first involves forming a gate electrode on an insulating layer. Next, a gate dielectric layer is formed to enclose the gate electrode. Subsequently, a semiconductor layer, a conducting layer, and ...


2
Horng Chih Lin, Jien Sheng Chao, Liang Po Chen: Manufacturing method for deep-submicron P-type metal-oxide semiconductor shallow junction. National Science Council, Smith Gambrell & Russell Beveridge DeGrandi Weilacher & Young Intellectual Property Group, June 15, 1999: US05913123 (3 worldwide citation)

A method for manufacturing a deep-submicron P-type metal-oxide semiconductor shallow junction utilizes an electron terminal structure with a base covered by a layer containing boron, germanium, and silicon. This layer containing boron, germanium, and silicon ("B--Ge--Si") is used as a shield during ...