1
Laurence H Cooke, Christopher E Phillips, Dale Wong: Integrated processor and programmable data path chip for reconfigurable computing. Burns Doane Swecker & Mathis, October 19, 1999: US05970254 (249 worldwide citation)

A reconfigurable processor chip has a mixture of reconfigurable arithmetic cells and logic cells for higher effective utilization than a standard FPGA. The reconfigurable processor includes a standard microprocessor such as an embedded RISC processor. Many different types of interfaces are used to i ...


2
Dale Wong, Christopher E Phillips, Laurence H Cooke: Integrated processor and programmable data path chip for reconfigurable computing. Chameleon Systems, Burns Doane Swecker & Mathis, August 28, 2001: US06282627 (234 worldwide citation)

The present invention, generally speaking, provides a reconfigurable computing solution that offers the flexibility of software development and the performance of dedicated hardware solutions. A reconfigurable processor chip includes a standard processor, blocks of reconfigurable logic (


3
Laurence H Cooke, Christopher E Phillips, Dale Wong: Method for compiling high level programming languages into an integrated processor with reconfigurable logic. Burns Doane Swecker & Mathis, October 12, 1999: US05966534 (197 worldwide citation)

A method is presented for automatically compiling a high level computer program down into an application specific integrated circuit coupled with a generic microprocessor. The original source code is written in a standard programming language such as ANSI C. Source code analysis is performed by our ...


4
Brent W Miller, William W Walker, Laurence H Cooke: Scannable latch system and method. Vertex Semiconductor Corporation, A C Smith, Greg T Sueoka, July 14, 1992: US05130568 (113 worldwide citation)

A scannable latch system comprises a plurality of scannable latches and clock driver circuit that allow at-speed testing of integrated circuits. Each scannable latch comprises a master latch, a slave latch and an auxiliary latch. The master latch is a two input latch capable of receiving data from t ...


5
Christopher E Phillips, Dale Wong, Laurence H Cooke: Reconfigurable logic for table lookup. Chameleon Systems, Burns Doane Swecker & Mathis, May 14, 2002: US06389579 (98 worldwide citation)

An integrated circuit which contains a processor, and configurable logic with configuration memory such that the configurable logic can emulate a large memory array when the contents of the array are very sparse. This structure allows for fast access and a continuous updating capability while remain ...


6
Laurence H Cooke, Christopher E Phillips, William J Allen: Preprogramming testing in a field programmable gate array. Crosspoint Solutions, Townsend and Townsend Khourie and Crew, September 13, 1994: US05347519 (90 worldwide citation)

A field programmable gate array integrated circuit which has numerous features for testing prior to programming the antifuses in the integrated circuit is provided. The circuits used to program the antifuses are also used for much of the preprogramming testing. The functionality of continuous series ...


7
Laurence H Cooke, Christopher E Phillips, Dale Wong: Method for compiling high level programming languages into embedded microprocessor with multiple reconfigurable logic. Intel Corporation, Blakely Sokoloff Taylor & Zafman, March 16, 2004: US06708325 (87 worldwide citation)

A computer implemented method for automatically compiling a computer program written in a high level programming language into an intermediate data structure. The data structure is analyzed to identify critical blocks of logic, which can be implemented as an application specific integrated circuit ( ...


8
Christopher E Phillips, Michael G Ahrens, Joseph G Nolan III, Laurence H Cooke: Programmable input/output buffer circuit with test capability. Crosspoint Solutions, Townsend and Townsend, June 22, 1993: US05221865 (85 worldwide citation)

An integrated circuit having system logic with programmable elements, decoding logic coupled to the programmable elements for addressing the programmable elements and a plurality of input/output buffer circuits for passing signals between the system logic and the exterior of the integrated circuit t ...


9
Zvi Or Bach, Adrian Apostol, Laurence H Cooke: Integrated circuit communication techniques. cASIC Corporation, Connolly Bove Lodge & Hutz, October 21, 2008: US07439773 (79 worldwide citation)

An semiconductor device, containing logic blocks and high speed connections between the blocks, where the connections utilize current direction for logic representation rather than voltage level. Such high speed connections comprise differential transmitters which drive a pair of adjacent wires with ...


10
Laurence H Cooke: Nearest neighbor serial content addressable memory. Connolly Bove Lodge & Hutz, December 25, 2012: US08339824 (77 worldwide citation)

A digital design and technique may be used to implement a Manhattan Nearest Neighbor content addressable memory function by augmenting a serial content addressable memory design with additional memory and counters for bit serially accumulating in parallel and subsequently comparing in parallel all t ...