1
Joseph E Augenbraun, Larry A Pearlstein, Michael A Plotnick: Broadcast interactive multimedia system. Hitachi America, Peter L Michaelson, John T Peoples, Michaelson & Wallace, April 1, 1997: US05617565 (504 worldwide citation)

A procedure for selecting and storing data elements communicated from a common database to users of the database utilizing a communication link between each transmitter and a concomitant receiver accessible by the user. The transmitted information is augmented with attributes which are used at the r ...


2
Larry A Pearlstein, Joseph E Augenbraun, Frank A Lane: Method and apparatus for improved video display of progressively refreshed coded video. Hitachi America, John J Sideris, October 22, 1996: US05568200 (117 worldwide citation)

A method and apparatus for controlling the display of progressively refreshed decoded compressed image representative data is disclosed. Subframes of intracoded video signals, and subframes of intercoded video signals based on the intracoded video signals of successive video frames are used to const ...


3
Larry A Pearlstein: Drift reduction methods and apparatus. Hitachi America, Michael P Straub, Peter L Michaelson, Michaelson & Wallace, June 16, 1998: US05767907 (35 worldwide citation)

A video decoder capable of downsampling full resolution images on a block by block basis regardless of the downsampling rate is disclosed. When the applied downsampling rate does not divide evenly into the number of pixel values included in a block in the dimension being downsampled, the decoder gen ...


4
Larry A Pearlstein: Methods and apparatus for reducing drift in video decoders. Hitachi America, Michael P Straub, Peter L Michaelson, Michaelson & Wallace, July 8, 1997: US05646686 (33 worldwide citation)

A video decoder capable of downsampling full resolution images on a block by block basis regardless of the downsampling rate is disclosed. When the applied downsampling rate does not divide evenly into the number of pixel values included in a block in the dimension being downsampled, the decoder gen ...


5
Joseph E Augenbraun, Jill M Boyce, Larry A Pearlstein: Method and apparatus for increasing the recording time of a digital video tape recorder. Hitachi America, Kenyon & Kenyon, February 20, 1996: US05493456 (24 worldwide citation)

Method for increasing the recording time of a digital video tape recorder ("VTR") and for supporting multiple normal play modes of digital VTR operation, e.g., a standard play mode of operation and one or more long play modes of operation. To achieve long play mode operation data reduction is perfor ...


6
Joseph E Augenbraun, Jill M Boyce, Larry A Pearlstein: Method for recording digital data using a set of heads including a pair of co-located heads to record data at a rate lower than the full recording rate possible using the set of heads. Hitachi America, Kenyon & Kenyon, August 22, 1995: US05444575 (22 worldwide citation)

Method for increasing the recording time of a digital video tape recorder ("VTR") and for supporting multiple normal play modes of digital VTR operation, e.g., a standard play mode of operation and one or more long play modes of operation. To achieve long play mode operation data reduction is perfor ...


7
Joseph E Augenbraun, Jill M Boyce, Larry A Pearlstein: Method for recording digital data using a series of adjacent heads of alternating azimuths located on a headwheel to record data at a rate that is less than the full recording rate possible using the heads. Hitachi America, Michael P Straub, Peter L Michaelson, Michaelson & Wallace, September 16, 1997: US05668918 (7 worldwide citation)

Method for increasing the recording time of a digital video tape recorder ("VTR") and for supporting multiple normal play modes of digital VTR operation, e.g., a standard play mode of operation and one or more long play modes of operation. To achieve long play mode operation data reduction is perfor ...


8
Richard J Selvaggi, Larry A Pearlstein: SIMD processor executing min/max instructions. ATI Technologies, Vedder Price P C, October 7, 2008: US07434034 (5 worldwide citation)

The result of eight find_min_16 of lookup-min_16, find_max_l6x, lookup_max_16 instructions may be stored in memory storage units of operand storage 24, using SIMD at addressing techniques detailed in U.S. patent application Ser. No. 10/929,992, filed Aug. 30, 2004 and entitled SIMD PROCESSOR AND ADD ...


9
Richard J Selvaggi, Larry A Pearlstein: Method and apparatus for managing tasks in a multiprocessor system. Broadcom Corporation, McAndrews Held & Malloy, June 22, 2010: US07743376 (2 worldwide citation)

In a multiprocessor system, a task control processor may be placed in the path connecting each execution processor to a system bus. Such task control processors may detect the completion of a first task on an associated execution processor and, responsively, generate commands to lead to the initiati ...


10
Richard J Selvaggi, Larry A Pearlstein: SIMD processor with register addressing, buffer stall and methods. ATI Technologies, Vedder Price PC, October 7, 2008: US07434024 (2 worldwide citation)

A single instruction, multiple data (SIMD) processor including a plurality of addressing register sets, used to flexibly calculate effective operand source and destination memory addresses is disclosed. Two or more address generators calculate effective addresses using the register sets. Each regist ...