1
Koon Chong So: Structure to provide effective channel-stop in termination areas for trenched power transistors. MegaMOS Corporation, Bo In Lin, March 2, 1999: US05877528 (147 worldwide citation)

The present invention discloses a trenched DMOS device supported on a substrate of a first conductivity type including a core cell area which includes at least a trenched DMOS cell having a gate disposed in a trench and a drain region disposed in the substrate, the substrate further includes a termi ...


2
Koon Chong So, Yan Man Tsui, Fwu Iuan Hshieh, True Lon Lin, Danny Chi Nim: MOSFET structure and fabrication process implemented by forming deep and narrow doping regions through doping trenches. MegaMOS Corporation, Bo In Lin, April 20, 1999: US05895951 (105 worldwide citation)

This invention discloses a MOSFET device which includes a plurality of vertical cells each includes a source, a drain, and a channel for conducting source-to-drain current therethrough. Each of the vertical cells is surrounded by a polysilicon layer acting as a gate for controlling the source-to-dra ...


3
Richard A Blanchard, Fwu Iuan Hshieh, Koon Chong So: Trench DMOS transistor with embedded trench schottky rectifier. General Semiconductor, David B Bonham Esq, Karin L Williams Esq, Mayer Fortkort & Williams PC, September 16, 2003: US06621107 (84 worldwide citation)

A merged device is that comprises a plurality of MOSFET cells and a plurality of Schottky rectifier cells, as well as a method of designing and making the same. According to an embodiment of the invention, the MOSFET cells comprise: (a) a source region of first conductivity type formed within an upp ...


4
Fwu Iuan Hshieh, Yan Man Tsui, Koon Chong So: Trench DMOS transistor with embedded trench schottky rectifier. General Semiconductor, David B Bonham Esq, Mayer Fortkort & Williams PC, July 15, 2003: US06593620 (82 worldwide citation)

An integrated circuit having a plurality of trench Schottky barrier rectifiers within one or more rectifier regions and a plurality of trench DMOS transistors within one or more transistor regions. The integrated circuit includes: (a) a substrate of a first conductivity type; (b) an epitaxial layer ...


5
Koon Chong So, Fwu Iuan Hshieh: Power transistor cells provided with reliable trenched source contacts connected to narrower source manufactured without a source mask. MegaMOS Corporation, Bo In Lin, August 28, 2001: US06281547 (79 worldwide citation)

The present invention discloses a DMOS transistor cell, supported on a substrate of a first conductivity type. The DMOS transistor cell includes a body region of a second conductivity type disposed in the substrate defining a central portion of the cell. This DMOS transistor cell further includes a ...


6
Fwu Iuan Hshieh, Koon Chong So: Trench MOSFET with double-diffused body profile. General Semiconductor, David B Bonham Esq, Karin L Williams Esq, Mayer Fortkort & Williams PC, October 29, 2002: US06472678 (79 worldwide citation)

A trench MOSFET device and process for making the same are described. The trench MOSFET has a substrate of a first conductivity type, an epitaxial layer of the first conductivity type over the substrate, the epitaxial layer having a lower majority carrier concentration than the substrate, a pluralit ...


7
Fwu Iuan Hshieh, Koon Chong So, Yan Man Tsui: Trench MOSFET with structure having low gate charge. General Semiconductor, David B Bonham Esq, Karin L Williams Esq, Mayer Fortkort & Williams PC, October 29, 2002: US06472708 (76 worldwide citation)

A trench MOSFET includes a plurality of trench segments in an upper surface of an epitaxial layer, extending through a second conductivity type region into a first conductivity type epitaxial region, each segment at least partially separated from an adjacent segment by a terminating region, and the ...


8
Fwu Iuan Hshieh, Koon Chong So: Method of forming a semiconductor structure having reduced threshold voltage and high punch-through tolerance. MagePower Semiconductor, Kam T Tam, May 25, 1999: US05907776 (73 worldwide citation)

A power MOSFET (Metal Oxide Semiconductor Field Effect Transistor) device formed on a semiconductor substrate having a body region of a first conductivity type diffused in a semiconductor substrate with an epitaxial layer of a second conductivity type. There is also a source region of a second condu ...


9
Fwu Iuan Hshieh, Koon Chong So, Yan Man Tsui: Devices and methods for addressing optical edge effects in connection with etched trenches. General Semiconductor, David B Bonham Esq, Mayer Fortkort & Williams PC, November 5, 2002: US06475884 (72 worldwide citation)

In a first aspect of the invention, a modified semiconductor substrate is provided. The modified substrate comprises: (1) a semiconductor substrate; (2) at least one buffer layer provided over at least a portion of the substrate; and (3) a plurality of trenches comprising (a) a plurality of internal ...


10
Fwu Iuan Hshieh, Koon Chong So, John E Amato, Yan Man Tsui: Trench MOSFET device with improved on-resistance. General Semiconductor, David B Bonham Esq, Heather L Mansfield Esq, Mayer Fortkort & Williams PC, December 2, 2003: US06657254 (61 worldwide citation)

A trench MOSFET device and method of making the same. The trench MOSFET device comprises: (a) a substrate of a first conductivity type; (b) an epitaxial layer of the first conductivity type over the substrate, wherein the epitaxial layer has a lower majority carrier concentration than the substrate; ...