1
Kikuzo Sawada, Toshio Wada: Non-volatile semiconductor memory device capable of storing multi-value data in each memory cell. Nippon Steel Corporation, Pollock Vande Sande & Priddy, May 2, 1995: US05412601 (152 worldwide citation)

An electrically erasable non-volatile semiconductor memory device comprising a plurality of row lines and column lines, a plurality of memory cells connected in a matrix to the plurality of row lines and column lines, a selection circuit for selecting a desired one of the plurality of memory cells, ...


2
Kikuzo Sawada, Yoshikazu Sugawara: Non-volatile semiconductor memory device detachable deterioration of memory cells. Nippon Steel Corporation, Pollock Vande Sande & Priddy, September 12, 1995: US05450354 (88 worldwide citation)

A non-volatile semiconductor memory device capable of electrical programming including a plurality of memory cells, means for selecting at least one memory cell from the plurality of memory cells, mode setting means for setting one of a first read mode in which data written in the selected memory ce ...


3
Kikuzo Sawada, Toshio Wada, Yoshikazu Sugawara: Non-volatile semiconductor memory device having memory cells, each for at least three different data writable thereinto selectively and a method of using the same. Nippon Steel Corporation, Pollock Vande Sande & Priddy, September 12, 1995: US05450341 (66 worldwide citation)

A method of writing or reading at least three different data in each memory cell, in a non-volatile semiconductor memory device having a plurality of memory cells, each memory cell having floating gate for setting a given threshold voltage in the memory cell. In addition, a non-volatile semiconducto ...


4
Kikuzo Sawada: Semiconductor memory device having self-correcting function. Rohm, Fay Sharpe Beall Fagan Minnich & McKee, September 29, 1992: US05151906 (47 worldwide citation)

A semiconductor memory device having a self-correcting function comprises memory cells for storing data and memory cells for storing parity bit data. The criterion of detecting in the first read circuit is set smaller and the criterion of detecting in the second read circuit is set greater in value ...


5
Kikuzo Sawada: Bootstrap circuit. Nippon Steel Corporation, Pollock Vande Sande & Priddy, May 7, 1996: US05514994 (32 worldwide citation)

A bootstrap circuit particularly suitable for low voltage applications and use with semiconductor memories is disclosed.


6
Kikuzo Sawada: Non-volatile semiconductor memory device and a method of using the same. Nippon Steel Corporation, Pollock Vande Sande & Priddy, February 13, 1996: US05491656 (22 worldwide citation)

An electrically alterable non-volatile semiconductor memory. The memory cells are formed in a matrix of columns and rows. A row decoder and column decoder are provided to select one of the row lines and column lines. Mode selection means are provided for selecting a writing mode, a first erasing mod ...


7
Kikuzo Sawada, Yoshikazu Sugawara: Semiconductor booster circuit having cascaded MOS transistors. Nippon Steel Corporation, Connolly Bove Lodge & Hutz, August 5, 2003: US06603346 (21 worldwide citation)

A semiconductor booster circuit includes: a plurality of stages, each having a first MOS transistor and a first capacitor having one terminal connected to a drain terminal of the first MOS transistor, the stages being connected in series by connecting the first MOS transistors of the stages in casca ...


8
Kikuzo Sawada, Yoshikazu Sugawara: Non-volatile semiconductor memory device having disturb verify function. Nippon Steel Corporation, Pollock Vande Sande & Priddy, February 6, 1996: US05490110 (21 worldwide citation)

The electrically rewritable nonvolatile semiconductor memory device includes a plurality of memory cells arranged in rows and columns, a decoder circuit for selecting at least one of the plurality of memory cells, a writing circuit for writing data in the selected memory cell through the decoder cir ...


9
Kikuzo Sawada, Kouzi Tanagawa, Nobuhiro Tomari, Tomoaki Yoshida: Self-correcting semiconductor memory device and microcomputer incorporating the same. Oki Electric, Wenderoth Lind & Ponack, February 13, 1990: US04901320 (21 worldwide citation)

In a nonvolatile memory device or a microcomputer with a nonvolatile memory, data errors arising from loss of charge in the floating gates of memory cells are detected and corrected by applying two different sense voltages to the memory cells and comparing the outputs. Instead of using a cumbersome ...


10
Kikuzo Sawada: Electrically alterable nonvolatile semiconductor memory. Nippon Steel Corporation, Pollock Vande Sande & Armernick, December 14, 1999: US06000843 (12 worldwide citation)

An electrically alterable nonvolatile semiconductor memory device has a first memory array including a plurality of first memory cells and a second memory array including at least one second memory cell, wherein contents of the first memory array and contents of the second memory array are capable o ...