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Kevin Kok Chan, Christopher Peter D Emic, Erin Catherine Jones, Paul Michael Solomon, Sandip Tiwari: Method for making bonded metal back-plane substrates. International Business Machines Corporation, McGinn & Gibb P C, May 2, 2000: US06057212 (138 worldwide citation)

A method of forming a semiconductor structure, includes steps of growing an oxide layer on a substrate to form a first wafer, separately forming a metal film on an oxidized substrate to form a second wafer, attaching the first and second wafers, performing a heat cycle for the first and second wafer ...


2
Kevin Kok Chan, Jack Oon Chu, Khalid EzzEldin Ismail, Stephen Anthony Rishton, Katherine Lynn Saenger: Scalable MOS field effect transistor. International Business Machines Corporation, Robert M Trepp, August 1, 2000: US06096590 (93 worldwide citation)

A field effect transistor and method for making is described incorporating self aligned source and drain contacts with Schottky metal-to-semiconductor junction and a T-shaped gate or incorporating highly doped semiconductor material for the source and drain contacts different from the channel materi ...


3
Atul Champaklal Ajmera, Cyril Cabral Jr, Roy Arthur Carruthers, Kevin Kok Chan, Guy Moshe Cohen, Paul Michael Kozlowski, Christian Lavoie, Joseph Scott Newbury, Ronnen Andrew Roy: Self-aligned silicide (salicide) process for strained silicon MOSFET ON SiGe and structure formed thereby. International Business Machines Corporation, Kevin M Jordan Esq, McGinn & Gibb PLLC, January 7, 2003: US06503833 (33 worldwide citation)

A method of forming a semiconductor substrate (and resultant structure), includes providing a semiconductor substrate to be silicided including a source and drain formed therein on respective sides of a gate, depositing a metal film over the gate, source and drain regions, reacting the metal film wi ...


4
Kevin Kok Chan, Sandip Tiwari: Light emitting structures in back-end of line silicon technology. International Business Machines Corporation, Marian Underweiser Esq, Scully Scott Murphy & Presser, May 22, 2001: US06236060 (25 worldwide citation)

A light emitting device is disclosed comprising a bottom layer of electrically conductive material. A block of electrically insulating material is disposed on the bottom layer. At least a portion of the block is optically transparent. A top layer of electrically conductive material is disposed on th ...


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Cyril Cabral Jr, Kevin Kok Chan, Guy Moshe Cohen, Christian Lavoie, Ronnen Andrew Roy, Paul Michael Solomon: Self-aligned silicide (salicide) process for low resistivity contacts to thin film silicon-on-insulator and bulk MOSFETS and for shallow junctions. International Business Machines Corporation, Wan Yee Cheung Esq, McGinn & Gibb PLLC, January 17, 2006: US06987050 (12 worldwide citation)

A method (and resulting structure) for fabricating a silicide for a semiconductor device, includes depositing a metal or an alloy thereof on a silicon substrate, reacting the metal or the alloy to form a first silicide phase, etching any unreacted metal, depositing a silicon cap layer over the first ...


7
Cyril Cabral Jr, Kevin Kok Chan, Guy Moshe Cohen, Kathryn Wilder Guarini, Christian Lavoie, Ronnen Andrew Roy, Paul Michael Solomon: Self-aligned silicide process utilizing ion implants for reduced silicon consumption and control of the silicide formation temperature and structure formed thereby. International Business Machines Corporation, Wan Yee Cheung Esq, McGinn & Gibb PLLC, April 6, 2004: US06716708 (10 worldwide citation)

A method (and resultant structure) for forming a metal silicide contact on a silicon-containing region having controlled consumption of said silicon-containing region, includes implanting Ge into the silicon-containing region, forming a blanket metal-silicon mixture layer over the silicon-containing ...


8
Leena Paivikki Buchwalter, Kevin Kok Chan, Timothy Joseph Dalton, Christopher Vincent Jahnes, Jennifer Louise Lund, Kevin Shawn Petrarca, James Louis Speidell, James Francis Ziegler: Low temperature Bi-CMOS compatible process for MEMS RF resonators and filters. International Business Machines Corporation, F Chau & Associates, Louis J Percello Esq, May 17, 2011: US07943412 (9 worldwide citation)

A method of formation of a microelectromechanical system (MEMS) resonator or filter which is compatible with integration with any analog, digital, or mixed-signal integrated circuit (IC) process, after or concurrently with the formation of the metal interconnect layers in those processes, by virtue ...


9
Nestor Alexander Bojarczuk Jr, Kevin Kok Chan, Christopher Peter D Emic, Evgeni Gousev, Supratik Guha, Paul C Jamison, Lars Ake Ragnarsson: Complementary metal oxide semiconductor (CMOS) gate stack with high dielectric constant gate dielectric and integrated diffusion barrier. International Business Machines Corporation, Wan Yee Cheung Esq, McGinn & Gibb PLLC, May 10, 2005: US06891231 (7 worldwide citation)

A diffusion barrier (and method for forming the diffusion barrier) for a field-effect transistor having a channel region and a gate electrode, includes an insulating material being disposed over the channel region. The insulating material includes nitrogen (N), and is disposed under the gate electro ...


10
Paul Stephen Andry, Chen Cai, Kevin Kok Chan, Praveen Chaudhari, James Patrick Doyle, Eileen Ann Galligan, Richard Allen John, James Andrew Lacey, Shui Chih Alan Lien: Vertical aligned liquid crystal display and method using dry deposited alignment layer films. International Business Machines Corporation, Robert M Trepp Esq, McGinn & Gibb PLLC, April 20, 2004: US06724449 (7 worldwide citation)

A liquid crystal display device includes a first substrate, a dry alignment film deposited over the substrate, a second substrate coupled to the first substrate with the dry alignment film deposited over the second substrate therebetween and forming a cell gap, and a liquid crystal material formed i ...