1
Yoshimasa Masuoka, Toyohiko Kagimasa, Katsuyoshi Kitai, Fumio Noda: System using environment manager with resource table in each computer for managing distributed computing resources managed for each application. Hitachi, Antonelli Terry Stout & Kraus, June 27, 2000: US06081826 (67 worldwide citation)

In correspondence to an application, a resource table to manage computing resources which are available for the application is provided in a rule such that a plurality of applications can mutually use distributed computing resources which could be used so far by itself and can effectively use many d ...


2
Katsuyoshi Kitai, Satoshi Yoshizawa, Toyohiko Kagimasa, Fumio Noda, Yoshimasa Masuoka, Yoshifumi Takamoto: Networking system and parallel networking method. Hitachi, Antonelli Terry Stout & Kraus, September 7, 1999: US05948069 (64 worldwide citation)

A networking method and system for performing data communication to a client computer from a server computer having a plurality of network interfaces through a network. The invention includes a LAN switch, provided between the network and the server computer. The LAN switch includes a plurality of c ...


3
Yasuhiro Inagami, Yoshiko Tamaki, Katsuyoshi Kitai: Vector multiprocessor system which individually indicates the data element stored in common vector register. Hitachi, Antonelli Terry Stout & Kraus, April 28, 1992: US05109499 (63 worldwide citation)

At least one common vector register capable of being accessed from a plurality of vector processors constituting the multiprocessor is provided in order to transfer vector data among the vector processors at a high speed. The common vector register includes data fields each holding the value of vect ...


4
Tadayuki Sakakibara, Teruo Tanaka, Yoshiko Tamaki, Katsuyoshi Kitai, Yasuhiro Inagami: Vector processor adopting a memory skewing scheme for preventing degradation of access performance. Hitachi, Antonelli Terry Stout & Kraus, December 31, 1996: US05590353 (55 worldwide citation)

A vector processor includes a storage control apparatus which incorporates an access request buffer unit equipped with an address decoding unit having address decoder circuits corresponding to all models of the vector processors belonging to a same machine series. By using model ID signals, the addr ...


5
Toshiaki Tarui, Naonobu Sukegawa, Hiroaki Fujii, Katsuyoshi Kitai: Access control method for a shared main memory in a multiprocessor based upon a directory held at a storage location of data in the memory after reading data to a processor. Hitachi, Antonelli Terry Stout & Kraus, February 25, 1997: US05606686 (41 worldwide citation)

A main memory shared by plural processing units in a parallel computer system is composed of plural partial main memories. A directory for each data line of the main memory is generated after the data line has been cached in one of the processing units. The directory is held in one of the partial ma ...


6
Yoshifumi Takamoto, Hiroki Kanai, Tadahiro Takase, Katsuyoshi Kitai, Yoshimasa Masuoka: Method of transferring packet data in a network by transmitting divided data packets. Hitachi, Antonelli Terry Stout & Kraus, May 11, 1999: US05903724 (40 worldwide citation)

A communication controller at the sending computer divides data transferred from a host into sub-ACK unit packets and transfers them sequentially to a destination without waiting for the sub-ACK's being subsequently provided by the destination. A communication controller at the receiving computer is ...


7
Frederico Buchholz Maciel, Katsuyoshi Kitai, Satoshi Yoshizawa, Hideki Murahashi, Tatsuo Higuchi: Method and system for dynamically balancing network traffic using address resolution protocol. Hitachi, Beall Law Offices, August 29, 2000: US06112248 (33 worldwide citation)

This invention provides dynamic balance of the traffic among data processing devices interconnecting networks and thereby improve the networking performance. For network traffic flowing between a first network and a second network, the traffic is distributed among the data processing devices that ac ...


8
Katsuyoshi Kitai, Yasuhiro Inagami, Yoshiko Tamaki, Yoshikazu Tanaka: Information processing system capable of executing a single instruction for watching and waiting for writing of information for synchronization by another processor. Hitachi, Antonelli Terry Stout & Kraus, August 8, 1995: US05440750 (29 worldwide citation)

Each processor of a multiprocessor system which shares a main storage has a execution circuit for executing a compare and watch instruction provided for watching information for synchronization written into a main storage. When one program being executed by one of the processors issues an instructio ...


9
Katsuyoshi Kitai, Yoshimasa Masuoka, Satoshi Yoshizawa, Frederico Buchholz Maciel, Toshiaki Tarui, Tatsuo Higuchi, Hideki Murahashi: Network data communication system. Hitachi, Antonelli Terry Stout & Kraus, June 11, 2002: US06404766 (29 worldwide citation)

In order to execute a flow control and a congestion control in a hop-by-hop manner in a data communication among computers connected to different networks, in a data communication between a client A


10
Teruo Tanaka, Yasuhiro Inagami, Yoshiko Tamaki, Tadayuki Sakakibara, Katsuyoshi Kitai: Parallel processing system and compiling method used therefor. Hitachi, Antonelli Terry Stout & Kraus, August 16, 1994: US05339429 (28 worldwide citation)

A parallel processing system includes tightly coupled multiprocessors. Each multiprocessor incorporates a local extended storage device which is a secondary storage device for a main storage device. The tightly coupled multiprocessors are connected with each other through a shared extended storage d ...