1
Katsuya Okumura: Semiconductor device having stacking structure. Kabushiki Kaisha Toshiba, Finnegan Henderson Farabow Garrett & Dunner, February 21, 1989: US04807021 (243 worldwide citation)

A semiconductor device includes a base semiconductor structure including semiconductor elements, interconnection layers for connecting the semiconductor elements together, and conductive pads to which the interconnection layers are connected, at least one stacking semiconductor structure including s ...


2
Nobuo Hayasaka, Katsuya Okumura, Keiichi Sasaki, Mie Matsuo: Multichip semiconductor device, chip therefor and method of formation thereof. Kabushiki Kaisha Toshiba, Finnegan Henderson Farabow Garrett & Dunner L, October 26, 2004: US06809421 (242 worldwide citation)

A multichip semiconductor device is disclosed in which chips are stacked each of which comprises a semiconductor substrate formed on top with circuit components and an interlayer insulating film formed on the top of the semiconductor substrate. At least one of the chips has a connect plug of a metal ...


3
William J Cote, James G Ryan, Katsuya Okumura, Hiroyuki Yano: Apparatus for processing semiconductor wafers. Kabushiki Kaisha Toshiba, Banner & Allegretti, July 9, 1996: US05534106 (99 worldwide citation)

The invention is directed to a semi-conductor wafer processing machine including an arm having a wafer carrier disposed at one end. The wafer carrier is rotatable with the rotating motion imparted to a semi-conductor wafer held thereon. In first embodiment, the machine further includes a rotatable p ...


4
Katsuya Okumura, Kunihiro Furuya: Probe pins zero-point detecting method, and prober. Octec, Tokyo Electron, Oblon Spivak McClelland Maier & Neustadt P C, April 4, 2006: US07023226 (93 worldwide citation)

A zero-point detecting method of this invention is performed prior to testing the electrical characteristics of a wafer by bringing an object to be tested on a stage and probes of a probe card into contact with each other. The surface of a zero-point detection plate is made of a conductive material ...


5
Koji Sakui, Junichi Miyamoto, Nobuo Hayasaka, Katsuya Okumura: Multichip semiconductor device and memory card. Kabushiki Kaisha Toshiba, Banner & Witcoff, May 29, 2001: US06239495 (86 worldwide citation)

A multichip semiconductor device comprises a plurality of semiconductor chips, each including elements integrated in a semiconductor substrate. The semiconductor chips have substantially the same structure. Each semiconductor chip includes a connecting plug inserted in a through hole made through th ...


6
Katsuya Okumura, Takahiko Moriya, Shinji Miyazaki, Yoshio Kumagai, Susumu Tanaka: Film forming method and film forming device. Kabushiki Kaisha Toshiba, Tokyo Electron, Tokyo Electron Sagami, Oblon Spivak McClelland Maier & Neustadt, May 14, 1991: US05015330 (76 worldwide citation)

A film forming method comprises the steps of placing a plurality of objects to be processed and supplying an etching gas in a reaction container, removing a natural oxidization originated film on an object to be processed placed in the reaction container under a heating condition by plasma etching, ...


7
Kazuko Oi, Shigehiro Hara, Kiyomi Koyama, Koji Hashimoto, Shinichi Ito, Katsuya Okumura: Method for designing phase-shifting masks with automatization capability. Kabushiki Kaisha Toshiba, Foley & Lardner, July 23, 1996: US05538815 (72 worldwide citation)

A method for designing a phase-shifting mask in a manner that a phase shifter of the mask is arranged so that a phase difference between light transmitted through clear areas with the phase shifter and light transmitted through clear areas without the phase shifter is set to 180.degree. or further d ...


8
Toru Watanabe, Katsuya Okumura, Katsuhiko Hieda: Metallization structure and method for a semiconductor device. Kabushiki Kaisha Toshiba, Banner & Witcoff, September 26, 2000: US06124189 (71 worldwide citation)

A method for forming a metal-strapped polysilicon gate and for simultaneously forming a strapped-metal polysilicon gate and a metal contact filling includes the steps of forming a gate dielectric layer on a surface of a silicon substrate; forming a polysilicon layer on the gate dielectric layer; for ...


9
Kikuo Yamabe, Katsuya Okumura: Method of thermally processing semiconductor wafers and an apparatus therefor. Kabushiki Kaisha Toshiba, Cushman Darby & Cushman, November 9, 1993: US05259883 (66 worldwide citation)

An apparatus for thermally processing semiconductor wafers within a reaction tube in which the wafers are thermally processed in a higher temperature region within the reaction tube. The thermally processed semiconductor waters are moved into a lower temperature region within the reaction tube. The ...


10
Hiroyuki Yano, Katsuya Okumura: Pad condition and polishing rate monitor using fluorescence. Kabushiki Kaisha Toshiba, Banner & Allegretti, January 9, 1996: US05483568 (64 worldwide citation)

The invention is directed to a method for detecting the chemical mechanical polishing rate of a surface of a semi-conductor wafer. In chemical mechanical polishing, a slurry made of abrasive particles suspended in a chemically abrasive liquid is dispensed on the surface of a rotating polishing pad. ...