1
Toru Sato, Naoto Okazaki, Toshihisa Hasegawa, Katsumasa Fujii, Kazukiyo Takano: Breath synchronized gas-insufflation device and method therefor. Tottori University, Spencer & Frank, August 18, 1987: US04686974 (148 worldwide citation)

Steady insufflation of a gas starts before the beginning of each inhalation, and a pulse-like peak flow insufflation of the gas is superposed on the steady insufflation for a short period of times at the beginning of the inhalation, and the steady insufflation is terminated before the end of the inh ...


2
Toru Sato, Naoto Okazaki, Katsumasa Fujii: Breath-synchronized concentrated-oxygen supplier. Tottori University, Spencer & Frank, July 21, 1987: US04681099 (103 worldwide citation)

A breath-synchronized concentrated-oxygen supplier comprising an oxygen concentrator for producing and storing oxygen-enriched gas, and a buffer tank having an inlet connected to the oxygen concentrator and an outlet for temporarily storing the oxygen-enriched gas obtained from the concentrator. A v ...


3
Tsutomu Ashida, Kiyotoshi Nakagawa, Katsumasa Fujii, Yasuo Torimaru: High voltage MOS transistor. Sharp Kabushiki Kaisha, Birch Stewart Kolasch & Birch, August 7, 1990: US04947232 (44 worldwide citation)

A metal oxide semiconductor device is featured by the provision of a covering element for covering a channel region of the semiconductor device there being interposed therebetween an insulating layer. The covering element is connected to at least one electrode selected from the drain electrode, the ...


4
Sheng Teng Hsu, Katsumasa Fujii, Hidechika Kawazoe, Jong Jan Lee: Locos MOS device for ESD protection. Sharp Microelectronics Technology, Sharp Kabushiki Kaisha, Gerald Maliszewski, David C Ripma, June 8, 1999: US05910673 (18 worldwide citation)

A MOS transistor having a multilevel gate oxide layer is provided for use in an ESD protection circuit. A thick gate oxide layer near the drain insures that the transistor has a relatively large drain to gate breakdown voltage. A thin gate oxide layer near the source permits the gate voltage to turn ...


5
Tomoya Baba, Katsumasa Fujii, Akiyoshi Mutou: Semiconductor device with NMOS including Si:C channel region and/or PMOS including SiGe channel region. Sharp Kabushiki Kaisha, Nixon & Vanderhye P C, August 10, 2004: US06774409 (17 worldwide citation)

A semiconductor device comprises: a semiconductor substrate on which a silicon germanium film, a carbon-containing silicon film and a silicon film are formed in this order and a gate electrode on the semiconductor substrate with intervention of a gate oxide film, wherein a channel region of the semi ...


6
Tsutomu Washino, Kazuhiko Oosaki, Masamitsu Moriwaki, Katsumasa Fujii, Chiyoki Yukawa, Tatsuo Akai, Kenshi Mitsunaga: Taste modifier and a method of modifying taste. San Ei Gen F F I, Greenblum & Bernstein, December 3, 1996: US05580545 (12 worldwide citation)

Taste modifier comprising a flavone derivative as an active ingredient of the general formula (I): ##STR1## wherein R.sub.1, R.sub.3, R.sub.4, R.sub.6 and R.sub.8 are independently a methoxy group or an hydrogen atom, R.sub.2 and R.sub.7 are methoxy groups, and R.sub.5 is a methoxy group or an hydro ...


7
Katsumasa Fujii, Naoshi Takeda: Boiler feed water pump control systems. Tokyo Shibaura Kenki Kabushiki Kaisha, Stevens Davis Miller & Mosher, November 6, 1979: US04173124 (9 worldwide citation)

The boiler feed water system is provided with a motor driven feed water pump and a steam turbine driven feed water pump. The control system comprises a digital computer including a flow quantity control system responsive to the degree of opening of a flow control valve and the discharge quantity of ...


8
Hidechika Kawazoe, Eiji Aoki, Sheng Teng Hsu, Katsumasa Fujii: Electrostatic discharge protection device for semiconductor integrated circuit method for producing the same and electrostatic discharge protection circuit using the same. Sharp Kabushiki Kaisha, NIxon & Vanderhye P C, January 15, 2002: US06338986 (9 worldwide citation)

An electrostatic discharge protection device according to the present invention is provided at an input or an output of a semiconductor integrated circuit for protecting an internal circuit of the semiconductor integrated circuit from an electrostatic surge flowing into or out of the semiconductor i ...


9
Samuel Martin, Xiangfeng Duan, Katsumasa Fujii, James M Hamilton, Hiroshi Iwata, Francisco Leon, Jeffrey Miller, Tetsu Negishi, Hiroshi Ohki, J Wallace Parce, Cheri X Y Pereira, Paul John Schuele, Akihide Shibata, David P Stumbo, Yasunobu Okada: Methods for nanowire alignment and deposition. Nanosys, Sharp Kabushiki Kaisha, Sterne Kessler Goldstein & Fox P L L C, June 28, 2011: US07968474 (8 worldwide citation)

The present invention provides methods and systems for nanowire alignment and deposition. Energizing (e.g., an alternating current electric field) is used to align and associate nanowires with electrodes. By modulating the energizing, the nanowires are coupled to the electrodes such that they remain ...


10
Hidechika Kawazoe, Eiji Aoki, Sheng Teng Hsu, Katsumasa Fujii: Electrostatic discharge protection device for semiconductor integrated circuit, method for producing the same, and electrostatic discharge protection circuit using the same. Sharp Kabushiki Kaisha, Nixon & Vanderhye P C, February 24, 2004: US06696730 (5 worldwide citation)

An electrostatic discharge protection device is provided at an input or output of a semiconductor integrated circuit for protecting an internal circuit from an electrostatic surge flowing into or out of the integrated circuit. The electrostatic discharge protection device may include a thyristor, an ...