Kangguo Cheng, Jack Allan Mandelman: Methods for fabricating a semiconductor structure using a mandrel and semiconductor structures formed thereby. International Business Machines Corporation, Wood Herron & Evans, December 7, 2010: US07847323 (10 worldwide citation)

Methods of fabricating a semiconductor structure in which a body of monocrystalline silicon is formed on a sidewall of a sacrificial mandrel and semiconductor structures made by the methods. After the body of monocrystalline silicon is formed, the sacrificial material of the mandrel is removed selec ...

Kangguo Cheng, Bruce B Doris, Ying Zhang: Asymmetric FinFET devices. International Business Machines Corporation, George Sai Halasz, Louis J Percello, September 11, 2012: US08263446 (10 worldwide citation)

Asymmetric FET devices, and a method for fabricating such asymmetric devices on a fin structure is disclosed. The fabrication method includes disposing over the fin a high-k dielectric layer followed by a threshold-modifying layer, performing an ion bombardment at a tilted angle which removes the th ...

Ruilong Xie, Xiuyu Cai Jr, Kangguo Cheng, Ali Khakifirooz: Methods of forming semiconductor devices with self-aligned contacts and low-k spacers and the resulting devices. GLOBALFOUNDRIES, Williams Morgan & Amerson P C, September 3, 2013: US08524592 (10 worldwide citation)

One illustrative method disclosed herein includes removing a portion of a sacrificial sidewall spacer to thereby expose at least a portion of the sidewalls of a sacrificial gate electrode and forming a liner layer on the exposed sidewalls of the sacrificial gate electrode. In this example, the metho ...

Kangguo Cheng, Dureseti Chidambarrao: Method of manufacturing a strained silicon on a SiGe on SOI substrate. International Business Machines Corporation, Lisa Jaklitsch, Greenblum & Bernstein P L, April 18, 2006: US07029964 (9 worldwide citation)

A semiconductor device with an undercut relaxed SiGe layer having voids beneath the SiGe layer. The voids may be filled with a dielectric such as SiO2. A strained Si layer may be epitaxially grown on the relaxed SiGe layer to combine the benefits of a defect-free strained Si surface and a silicon-on ...

Kangguo Cheng, Thomas N Adam, Ali Khakifirooz, Alexander Reznicek: Method and structure for forming ETSOI capacitors, diodes, resistors and back gate contacts. International Business Machines Corporation, H Daniel Schnurmann, April 29, 2014: US08709890 (9 worldwide citation)

An ETSOI transistor and a combination of capacitors, junction diodes, bank end contacts and resistors are respectively formed in a transistor and capacitor region thereof by etching through an ETSOI and BOX layers in a replacement gate HK/MG flow. The capacitor and other devices formation are compat ...

Ajey P Jacob, Kangguo Cheng, Bruce B Doris, Nicolas Loubet, Prasanna Khare, Ramachandra Divakaruni: Process for faciltiating fin isolation schemes. GLOBALFOUNDRIES, INTERNATIONAL BUSINESS MACHINES CORPORATION, STMicroelectronics, Kevin P Radigan Esq, Heslin Rothenberg Farley & Mesiti P C, July 28, 2015: US09093496 (9 worldwide citation)

Semiconductor fabrication methods are provided which include facilitating fabricating semiconductor fin structures by: providing a wafer with at least one fin extending above a substrate, the at least one fin including a first layer disposed above a second layer; mechanically stabilizing the first l ...

Kangguo Cheng, Ramachandra Divakaruni, Chun Yung Sung: Buried plate structure for vertical dram devices. International Business Machines Corporation, Cantor Colburn, Joseph Petrokaitis, November 10, 2009: US07615816 (9 worldwide citation)

A buried plate region for a semiconductor memory storage capacitor is self aligned with respect to an upper portion of a deep trench containing the memory storage capacitor.

Kangguo Cheng, Herbert L Ho, Geng Wang: Methods involving silicon-on-insulator trench memory with implanted plate. International Business Machines Corporation, Cantor Colburn, Rosa Suazo, June 23, 2009: US07550359 (9 worldwide citation)

A method for fabricating silicon-on-insulator (SOI) trench memory includes forming a trench on a substrate, wherein a buried oxide layer is disposed on the substrate, a SOI layer is disposed on the buried oxide layer, and a hardmask layer is disposed on the SOI layer, implanting ions into the substr ...

Hiroyuki Akatsu, Kangguo Cheng, Kenneth Settlemyer: Method and structure for improved trench processing. International Business Machines Corporation, Daryl K Neff, H Daniel Schnurmann, November 22, 2005: US06967136 (9 worldwide citation)

A method is provided for making a trench capacitor by forming a trench in a substrate. The trench is then widened and a sacrificial collar is formed on sidewalls of the widened trench. The trench is then vertically deepened to extend below the sidewalls of the sacrificial collar. Subsequently, a cap ...

Jin Cai, Kangguo Cheng, Ali Khakifirooz, Pranita Kulkarni: Integrated circuit having back gating, improved isolation and reduced well resistance and method to fabricate same. International Business Machines Corporation, Harrington & Smith, May 21, 2013: US08445356 (9 worldwide citation)

Disclosed is a method of forming a structure and a resulting structure. The method includes providing a semiconductor substrate; forming a first opening to a first depth in the semiconductor substrate; amorphizing semiconductor sidewalls of an upper portion of the first opening leaving unamorphized ...

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