61
Keith Kwong Hon Wong, Kangguo Cheng, Dechao Guo, Pranita Kulkarni: Integrated circuit with replacement metal gates and dual dielectrics. International Business Machines Corporation, Howard M Cohn, H Daniel Schnurmann, October 16, 2012: US08288296 (11 worldwide citation)

A replacement gate structure and method of fabrication are disclosed. The method provides for fabrication of both high performance FET and low leakage FET devices within the same integrated circuit. Low leakage FET devices are fabricated with a hybrid gate dielectric comprised of a low-K dielectric ...


62
Kangguo Cheng, Bruce B Doris, Ali Khakifirooz, Pranita Kulkarni: Controlled fin-merging for fin type FET devices. International Business Machines Corporation, George Sai Halasz, Louis J Percello, February 19, 2013: US08377759 (11 worldwide citation)

A method for fabricating FET devices is disclosed. The method includes forming continuous fins of a semiconductor material and fabricating gate structures overlaying the continuous fins. After the fabrication of the gate structures, the method uses epitaxial deposition to merge the continuous fins t ...


63
Kangguo Cheng, Thomas N Adam, Ali Khakifirooz, Alexander Reznicek: FinFET and method of fabrication. International Business Machines Corporation, Joseph Petrokaitis, Howard H Coho, March 17, 2015: US08981493 (11 worldwide citation)

An improved finFET and method of fabrication is disclosed. Embodiments of the present invention take advantage of the different epitaxial growth rates of {110} and {100} silicon. Fins are formed that have {110} silicon on the fin tops and {100} silicon on the long fin sides (sidewalls). The lateral ...


64
Kangguo Cheng, Jack Allan Mandelman: Methods for fabricating a semiconductor structure using a mandrel and semiconductor structures formed thereby. International Business Machines Corporation, Wood Herron & Evans, December 7, 2010: US07847323 (11 worldwide citation)

Methods of fabricating a semiconductor structure in which a body of monocrystalline silicon is formed on a sidewall of a sacrificial mandrel and semiconductor structures made by the methods. After the body of monocrystalline silicon is formed, the sacrificial material of the mandrel is removed selec ...


65
Tak H Ning, Kangguo Cheng, Ali Khakifirooz, Pranita Kulkarni: Junction field effect transistor with an epitaxially grown gate structure. International Business Machines Corporation, Scully Scott Murphy & Presser P C, H Daniel Schnurmann, May 7, 2013: US08435845 (11 worldwide citation)

A method of fabricating a semiconductor device that includes forming a replacement gate structure on a portion of a semiconductor substrate, wherein source regions and drain regions are formed in opposing sides of the replacement gate structure. A dielectric is formed on the semiconductor substrate ...


66
Xiuyu Cai, Ruilong Xie, Kangguo Cheng, Ali Khakifirooz: Methods of removing dummy fin structures when forming finFET devices. GLOBALFOUNDRIES, International Business Machines Corporation, Amerson Law Firm PLLC, April 22, 2014: US08703557 (11 worldwide citation)

One method disclosed herein includes forming a plurality of fin-formation trenches in a substrate that defines a plurality of fins, wherein at least one of the fins is a dummy fin, forming an insulating material that fills at least a portion of the trenches, forming a recess in a masking layer forme ...


67
Kangguo Cheng, Ramachandra Divakaruni: Patterned strained semiconductor substrate and device. International Business Machines Corporation, Joseph P Abate, Greenblum & Bernstein, June 10, 2008: US07384829 (10 worldwide citation)

A method that includes forming a pattern of strained material and relaxed material on a substrate; forming a strained device in the strained material; and forming a non-strained device in the relaxed material is disclosed. In one embodiment, the strained material is silicon (Si) in either a tensile ...


68
Kangguo Cheng, Thomas N Adam, Ali Khakifirooz, Alexander Reznicek: Method and structure for forming ETSOI capacitors, diodes, resistors and back gate contacts. International Business Machines Corporation, H Daniel Schnurmann, April 29, 2014: US08709890 (10 worldwide citation)

An ETSOI transistor and a combination of capacitors, junction diodes, bank end contacts and resistors are respectively formed in a transistor and capacitor region thereof by etching through an ETSOI and BOX layers in a replacement gate HK/MG flow. The capacitor and other devices formation are compat ...


69
Kangguo Cheng, Louis Lu Chen Hsu, Jack Allan Mandelman, Haining Yang: Structures incorporating semiconductor device structures with reduced junction capacitance and drain induced barrier lowering. International Business Machines Corporation, Wood Herron & Evans, July 19, 2011: US07984408 (10 worldwide citation)

Design structure embodied in a machine readable medium for designing, manufacturing, or testing a design. The design structure includes semiconductor device structures characterized by reduced junction capacitance and drain induced barrier lowering. The semiconductor device structure of the design s ...


70
Kangguo Cheng, Balasubramanian S Haran, Shom Ponoth, Theodorus E Standaert, Tenko Yamashita: FinFET with self-aligned punchthrough stopper. International Business Machines Corporation, Yuanmin Cai, Roberts Mlotkowski Safran & Cole P C, January 13, 2015: US08932918 (10 worldwide citation)

A finFET with self-aligned punchthrough stopper and methods of manufacture are disclosed. The method includes forming spacers on sidewalls of a gate structure and fin structures of a finFET device. The method further includes forming a punchthrough stopper on exposed sidewalls of the fin structures, ...