1
Katherina Babich
Deok kee Kim, Kenneth T Settlemyer Jr, Kangguo Cheng, Ramachandra Divakaruni, Carl J Radens, Dirk Pfeiffer, Timothy Dalton, Katherina Babich, Arpan P Mahorowala, Harald Okorn Schmidt: Methods and structures for protecting one area while processing another area on a chip. International Business Machines Corporation, Whitman Curtis Christofferson & Cook PC, Joseph P Abate, March 3, 2009: US07497959 (4 worldwide citation)

Increased protection of areas of a chip are provided by both a mask structure of increased robustness in regard to semiconductor manufacturing processes or which can be removed with increased selectivity and controllability in regard to underlying materials, or both. Mask structures are provided whi ...


2
Katherina Babich
Deok kee Kim, Kenneth T Settlemyer, Kangguo Cheng, Ramachandra Divakaruni, Carl J Radens, Dirk Pfeiffer, Thimothy Dalton, Katherina Babich, Arpan P Mahorowala, Harald Okorn Schmidt: Methods and structures for protecting one area while processing another area on a chip. Whitham Curtis & Christofferson PC, October 23, 2008: US20080261128-A1

Increased protection of areas of a chip are provided by both a mask structure of increased robustness in regard to semiconductor manufacturing processes or which can be removed with increased selectivity and controllability in regard to underlying materials, or both. Mask structures are provided whi ...


3
Katherina Babich
Deok kee Kim, Kenneth T Settlemyer, Kangguo Cheng, Ramachandra Divakaruni, Carl J Radens, Dirk Pfeiffer, Timothy Dalton, Katherina Babich, Arpan P Mahorowala, Harald Okorn Schmidt: Methods and structures for protecting one area while processing another area on a chip. International Business Machines Corporation, Whitham Curtis & Christofferson PC, November 17, 2005: US20050255386-A1

Increased protection of areas of a chip are provided by both a mask structure of increased robustness in regard to semiconductor manufacturing processes or which can be removed with increased selectivity and controllability in regard to underlying materials, or both. Mask structures are provided whi ...


4
Roger A Booth Jr, Kangguo Cheng, Jack A Mandelman: Tunneling effect transistor with self-aligned gate. International Business Machines Corporation, Scully Scott Murphy & Presser P C, H Daniel Schnumann, April 20, 2010: US07700466 (89 worldwide citation)

In one embodiment, a mandrel and an outer dummy spacer may be employed to form a first conductivity type region. The mandrel is removed to form a recessed region wherein a second conductivity type region is formed. In another embodiment, a mandrel is removed from within shallow trench isolation to f ...


5
Kangguo Cheng, Jack Allan Mandelman: Methods for forming semiconductor structures with buried isolation collars and semiconductor structures formed by these methods. International Business Machines Corporation, Wood Herron & Evans, October 12, 2010: US07811881 (74 worldwide citation)

A semiconductor structure including a trench formed in a substrate and a buried isolation collar that extends about sidewalls of the trench. The buried isolation collar is constituted by an insulator formed from a buried porous region of substrate material. The porous region is formed from a buried ...


6
Veeraraghavan S Basker, Kangguo Cheng, Bruce B Doris, Johnathan E Faltermeier, Ali Khakifirooz: High-K/metal gate CMOS finFET with improved pFET threshold voltage. International Business Machines Corporation, Tutunjian & Bitetto P C, Louis J Percello Esq, August 9, 2011: US07993999 (43 worldwide citation)

A device and method for fabrication of fin devices for an integrated circuit includes forming fin structures in a semiconductor material of a semiconductor device wherein the semiconductor material is exposed on sidewalls of the fin structures. A donor material is epitaxially deposited on the expose ...


7
Kangguo Cheng, Louis Lu Chen Hsu, Jack Allan Mandelman: Fin PIN diode. International Business Machines Corporation, Patterson & Sheridan, July 14, 2009: US07560784 (39 worldwide citation)

Embodiments of the invention generally relate to the field of semiconductor devices, and more specifically to fin-based junction diodes. A portion of a doped semiconductor fin may protrude through a first doped layer. An intrinsic layer may be disposed on the protruding semiconductor fin. A second s ...


8
Stephen W Bedell, Kangguo Cheng, Bruce B Doris, Ali Khakifirooz, Devendra K Sadana, Ghavam G Shahidi: Strained CMOS device, circuit and method of fabrication. International Business Machines Corporation, Tutunjian & Bitetto P C, Louis J Percello Esq, May 1, 2012: US08169025 (25 worldwide citation)

A semiconductor device and fabrication method include a strained semiconductor layer having a strain in one axis. A long fin and a short fin are formed in the semiconductor layer such that the long fin has a strained length along the one axis. An n-type transistor is formed on the long fin, and a p- ...


9
Kangguo Cheng, Balasubramanian S Haran, Shom Ponoth, Theodorus E Standaert, Tenko Yamashita: Bulk fin-field effect transistors with well defined isolation. International Business Machines Corporation, Jose Gutman, Fleit Gibbons Gutman Bongini & Bianco PL, April 16, 2013: US08420459 (25 worldwide citation)

A fin field-effect-transistor fabricated by forming a dummy fin structure on a semiconductor substrate. A dielectric layer is formed on the semiconductor substrate. The dielectric layer surrounds the dummy fin structure. The dummy fin structure is removed to form a cavity within the dielectric layer ...


10
Kangguo Cheng, Ramachandra Divakaruni, Carl J Radens: Trench optical device. International Business Machines Corporation, Graham S Jones II, September 13, 2005: US06943409 (17 worldwide citation)

A semiconductor device is formed in on a semiconductor substrate starting with a first step, which is to form a wide trench and a narrow trench in the substrate. Then form a first electrode in the narrow trench by depositing a first fill material of a first conductivity type over the device to fill ...



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