1
Junko Nakase, Yukio Fujii, Hiroshi Gunji, Katsumi Matsuno: Data demultiplexer. Hitachi, Antonelli Terry Stout & Kraus, April 21, 1998: US05742361 (34 worldwide citation)

A data demultiplexer includes a write controller, a memory, an analyzing processing unit, and transfer control units. The write controller writes packets which have arrived thereat into the memory in the order of arrival and sends the write information to the analyzing processing unit. The analyzing ...


2
Junko Nakase, Hirotsugu Kojima: Digital filter circuit. Hitachi, Antonelli Terry Stout & Kraus, June 22, 1993: US05222035 (27 worldwide citation)

When each sample is expressed by digital signals of 8 bits, 8 bits constituting each of the digital signals are divided into data of upper 5 bits including the most significant bit, and data of lower 4 bits including the least significant bit. These two data are respectively inputted to two filter c ...


3
Norio Sumi, Hirotsugu Kojima, Junko Nakase: Semiconductor operation device with memory for storing operation codes connected from coefficients prior to performing an operation on an input signal. Hitachi, Hitachi Device Engineering, Antonelli Terry Stout & Kraus, August 10, 1993: US05235538 (16 worldwide citation)

The present invention features performance of operation processing between a signal obtained by converting a coefficient into a Booth code with a Booth encoder, storing the Booth code in a memory device in advance and reading out the stored Booth code for processing an input signal in a semiconducto ...


4
Junko Nakase, Takashi Nakamoto: Digital filtering circuit. Hitachi, Mattingly Stanger & Malur P C, April 23, 2002: US06377968 (5 worldwide citation)

There is provided a filtering circuit whose circuit scale is small and which is suitable for a digital data string in which data of luminance signals Y and color-difference signals Cb and Cr are regularly inserted or multiplexed. The digital filtering circuit includes a delay line composed of a plur ...


5
Junko Nakase, Nobukazu Doi: Error correcting system. Hitachi, Antonelli Terry Stout & Kraus, August 1, 1995: US05438577 (4 worldwide citation)

An error correcting system for performing error correction for error codewords received sequentially in a codeword string on a pipeline processing basis. The system comprises a processing block for generating syndrome data on the basis of parity symbols of each of the codewords, a processing block f ...


6
Junko Nakase, Takashi Nakamoto: Digital filtering circuit. Hitachi, Mattingly Stanger & Malur P C, January 6, 2004: US06675183

There is provided a filtering circuit whose circuit scale is small and which is suitable for a digital data string in which data of luminance signals Y and color-difference signals Cb and Cr are regularly inserted or multiplexed. The digital filtering circuit comprises a delay line composed of a plu ...


7
Junko Nakase, Takashi Nakamoto: Digital filtering circuit. Hitachi, Mattingly Stanger & Malur PC, May 16, 2002: US20020059352-A1

There is provided a filtering circuit whose circuit scale is small and which is suitable for a digital data string in which data of luminance signals Y and color-difference signals Cb and Cr are regularly inserted or multiplexed. The digital filtering circuit comprises a delay line composed of a plu ...



Click the thumbnails below to visualize the patent trend.