1
Akihiko Takase, Shiro Tanabe, Noboru Endo, Ryoji Takeyari, Yusuke Mishina, Toshiya Oouchi, Junichirou Yanagi: Multicast communications method. Hitachi, Fay Sharpe Beall Fagan Minnich & McKee, March 18, 1997: US05612959 (82 worldwide citation)

Distributed LANs are connected to a wide area network through terminal adapters, which are interconnected by virtual circuits to form a logical bus network. Each terminal adapter copies cells received through the virtual circuit that is allocated for multicasting, and transfers the copied cells to t ...


2
Junichirou Yanagi, Yoshihiro Ashi, Takahiko Kozaki, Akihiko Takase, Takashi Nakashima: Shared buffer memory type ATM communication system and method with a broadcast facility. Hitachi, Nippon Telegraph and Telephone, Antonelli Terry Stout & Kraus, February 28, 1995: US05394397 (76 worldwide citation)

An ATM switching system which includes an input interface which is provided every incoming line and serves to convert header information of each input cell into internal routing information, a shared buffer memory and a cell writing control unit which forms normal cell list structures, which are pre ...


3
Junichirou Yanagi, Akihiko Takase, Takahiko Kozaki, Shinobu Gohara: Traffic shaping method and circuit. Hitachi, Antonelli Terry Stout & Kraus, January 18, 1994: US05280475 (63 worldwide citation)

A traffic shaping method and circuit of a packet switching system in which input packets having a fixed length and multiplexed on a plurality of inputs are multiplexed to be delivered on any output of a plurality of outputs, connects the input packet to a list structure using an address chain formed ...


4
Takahiko Kozaki, Junichirou Yanagi, Kiyoshi Aiki, Yutaka Ito, Kaoru Aoki: ATM switch1ng system connectable to I/O links having different transmission rates. Hitachi, Antonelli Terry Stout & Kraus, November 15, 1994: US05365519 (53 worldwide citation)

An ATM switching system comprises a switch unit including a plurality of input ports and a plurality of output ports having the same cell transmission rate, and a multiplexer for multiplexing cell trains outputted from at least two output ports into a single cell train and outputting the cell train ...


5
Ken ichi Sakamoto, Takahiko Kozaki, Junichirou Yanagi: Asynchronous transmission mode (ATM) handler. Hitachi, Antonelli Terry Stout & Kraus, June 13, 2000: US06075767 (30 worldwide citation)

An ATM handler that sets a switchover indication to a control register according to a system switchover order from a controller such that a switchover indication is supplied to a selector and line interfaces according to an output signal from the register. The setting of a switchover indication sync ...


6
Morihito Miyagi, Junichirou Yanagi: ATM network system and connection admission control method. Hitachi, Antonelli Terry Stout & Kraus, April 13, 1999: US05894471 (24 worldwide citation)

Apparatus for executing the connection admission control for PVC and SVC efficiently in an ATM network system which includes a network management equipment and a network equipment. The control function of the network management equipment executes resource allocation to PVC and SVC and notifies the n ...


7
Kaoru Aoki, Masataka Takano, Junichirou Yanagi, Tetsushi Nakano, Miho Iino: ATM communication system. Hitachi, Antonelli Terry Stout & Kruas, April 14, 1998: US05740158 (21 worldwide citation)

An ATM communication system including a plurality of communication nodes connected in a loop form by buses, buffers disposed in each communication node, a synchronizing pulse generation circuit for conducting cell demultiplexing of all communication nodes at the same timing, storage devices disposed ...


8
Katuyoshi Tanaka, Junichirou Yanagi, Akihiko Takase: Cell delineation method and cell delineation circuit. Hitachi, Hitachi VLSI Engineering Corporation, Antonelli Terry Stout & Kraus, October 13, 1992: US05155487 (19 worldwide citation)

In a cell delineation circuit, an input signal is converted into parallel signals, and a plurality of parallel signals (i.e. series of parallel signals) which are shifted one bit by one bit from each other are formed from those parallel signals. CRC (Cyclic Redundancy Check) calculations are execute ...


9
Akihiko Takase, Yoshihiro Ashi, Takashi Mori, Junichirou Yanagi: System switching method and apparatus without loss of signal in cell switching system of asynchronous transfer mode. Hitachi, Antonelli Terry Stout & Kraus, February 1, 1994: US05283782 (18 worldwide citation)

In a communication apparatus using an asynchronous transfer mode, there is provided a system switching method, and apparatus, without loss of signal for performing cell multiplexing or cell switching in a duplex system including a primary system and a standby system. In system switching, control inf ...


10
Yukio Nakano, Akihiko Takase, Masahiro Takatori, Junichirou Yanagi: Hit-less protection switching method and apparatus for ATM transmission lines. Hitachi, Antonelli Terry Stout & Kraus, May 24, 1994: US05315581 (15 worldwide citation)

A hit-less protection switching method and apparatus therefor for ATM transmission lines for selecting first cells from normal received signals and writing the same into a normal cell buffer, selecting second cells from emergency received signals and writing the same into an emergency cell buffer, r ...