1
Bin Yu, Judy Xilin An, Cyrus E Tabery, Haihong Wang: Method for forming multiple structures in a semiconductor device. Advanced Micro Devices, Harrity & Snyder, March 16, 2004: US06706571 (485 worldwide citation)

A method of forming multiple structures in a semiconductor device includes depositing a film over a conductive layer, etching a trench in a portion of the film and forming adjacent the sidewalls of the trench. The film may then be etched, followed by an of the conductive layer to form the structures ...


2
Zoran Krivokapic, Judy Xilin An, Srikanteswara Dakshina Murthy, Haihong Wang, Bin Yu: Narrow fin FinFET. Advanced Micro Devices, Harrity & Snyder, July 26, 2005: US06921963 (219 worldwide citation)

A narrow channel FinFET is described herein with a narrow channel width. A protective layer may be formed over the narrow channel, the protective layer being wider than the narrow channel.


3
Matthew S Buynoski, Judy Xilin An, Haihong Wang, Bin Yu: Double spacer FinFET formation. Advanced Micro Devices, Harrity & Snyder, March 23, 2004: US06709982 (155 worldwide citation)

A method for forming a group of structures in a semiconductor device includes forming a conductive layer on a substrate, where the conductive layer includes a conductive material, and forming an oxide layer over the conductive layer. The method further includes etching at least one opening in the ox ...


4
Bin Yu, William G En, Judy Xilin An, Concetta E Riccobene: Method of fabrication of semiconductor-on-insulator (SOI) wafer having a Si/SiGe/Si active layer. Advanced Micro Devices, Renner Otto Boisselle & Sklar, June 25, 2002: US06410371 (94 worldwide citation)

A method of forming a semiconductor-on-insulator (SOI) wafer. The method includes the steps of providing a first wafer, the first wafer having a silicon substrate and an oxide layer disposed thereon; providing a second wafer, the second wafer having a silicon substrate, the substrate of the second w ...


5
Judy Xilin An, Bin Yu: Asymmetrical double gate or all-around gate MOSFET devices and methods for making same. Advance Micro Devices, Harrity & Snyder, October 5, 2004: US06800885 (92 worldwide citation)

An asymmetric double gate metal-oxide semiconductor field-effect transistor (MOSFET) includes a first fin formed on a substrate; a second fin formed on the substrate; a first gate formed adjacent first sides of the first and second fins, the first gate being doped with a first type of impurity; and ...


6
Srikanteswara Dakshina Murthy, Judy Xilin An, Zoran Krivokapic, Haihong Wang, Bin Yu: Strained channel finfet. Advanced Micro Devices, Harrity & Snyder, October 12, 2004: US06803631 (91 worldwide citation)

A semiconductor structure includes a fin and a layer formed on the fin. The fin includes a first crystalline material having a rectangular cross section and a number of surfaces. The layer is formed on the surfaces and includes a second crystalline material. The first crystalline material has a diff ...


7
Bin Yu, Judy Xilin An, Cyrus E Tabery: Method for forming multiple fins in a semiconductor device. Advanced Micro Devices, Harrity & Snyder, March 29, 2005: US06872647 (86 worldwide citation)

A method of forming multiple fins in a semiconductor device includes forming a structure having an upper surface and side surfaces on the semiconductor device. The semiconductor device includes a conductive layer located below the structure. The method also includes forming spacers adjacent the stru ...


8
Bin Yu, Shibly S Ahmed, Judy Xilin An, Srikanteswara Dakshina Murthy, Zoran Krivokapic, Haihong Wang: Semiconductor device having a U-shaped gate structure. Advanced Micro Devices, Harrity & Snyder, December 21, 2004: US06833588 (80 worldwide citation)

A double-gate semiconductor device includes a substrate, an insulating layer, a fin and a gate. The insulating layer is formed on the substrate and the gate is formed on the insulating layer. The fin has a number of side surfaces, a top surface and a bottom surface. The bottom surface and at least a ...


9
Haihong Wang, Judy Xilin An, Bin Yu: Uniformly doped source/drain junction in a double-gate MOSFET. Advanced Micro Devices, Harrity & Snyder, April 6, 2004: US06716690 (80 worldwide citation)

Multiple dopant implantations are performed on a FinFET device to thereby distribute the dopant in a substantially uniform manner along a vertical depth of the FinFET in the source/drain junction. Each of the multiple implantations may be performed at different tilt angles.


10
Zoran Krivokapic, Judy Xilin An, Matthew S Buynoski: FinFET-based SRAM cell. Advanced Micro Devices, Harrity & Snyder, July 20, 2004: US06765303 (75 worldwide citation)

A SRAM cell includes a single FinFET and two resonant tunnel diodes. The FinFet has multiple channel regions formed from separate fins. The resonant tunnel diodes may be formed from FinFET type fins. In particular, the resonant diodes may includes a thin, undoped silicon region surrounded by a diele ...



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