1
Richard G Cliff, Srinivas T Reddy, Rina Raman, L Todd Cope, Joseph Huang, Bruce B Pedersen: Programmable logic array integrated circuit devices. Altera Corporation, Robert R Jackson, Fish & Neave, November 18, 1997: US05689195 (275 worldwide citation)

A programmable logic array integrated circuit device includes a plurality of regions of programmable logic disposed on the device in a two-dimensional array of interesting rows and columns. Interconnection conductors are associated with each row and column. The interconnection conductors associated ...


2
Richard G Cliff, L Todd Cope, Cameron R McClintock, William Leong, James A Watson, Joseph Huang, Bahram Ahanin: Programmable logic array integrated circuits. Altera Corporation, Townsend and Townsend and Crew, August 27, 1996: US05550782 (248 worldwide citation)

A programmable logic array integrated circuit has a number of programmable logic modules which are grouped together in a plurality of logic array blocks ("LABs"). The LABs are arranged on the circuit in a two dimensional array. A conductor network is provided for interconnecting any logic module wit ...


3
Richard G Cliff, L Todd Cope, Cameron McClintock, William Leong, James Allen Watson, Joseph Huang, Bahram Ahanin, Chiakang Sung, Wanli Chang: Programmable logic array integrated circuits. Altera Corporation, Robert R Jackson, Fish & Neave, October 27, 1998: US05828229 (136 worldwide citation)

A programmable logic array integrated circuit has a number of programmable logic modules which are grouped together in a plurality of logic array blocks ("LABs"). The LABs are arranged on the circuit in a two dimensional array. A conductor network is provided for interconnecting any logic module wit ...


4
Khai Nguyen, Chiakang Sung, Bonnie Wang, Joseph Huang, Phillip Pan, In Whan Kim, Gopi Rangan, Yan Chong, Xiaobao Wang, Tzung Chin Chang: Programmable I/O element circuit for high speed logic devices. Altera Corporation, Pennie & Edmonds LLLP, February 3, 2004: US06686769 (93 worldwide citation)

A programmable I/O element for an I/O terminal of a logic array is suitable for operating according to high speed I/O modes such as double data rate and zero bus turnaround. The I/O element may include an input block with two registers for registering input signals from the terminal upon alternate c ...


5
Richard G Cliff, Francis B Heile, Joseph Huang, David W Mendel, Bruce B Pedersen, Chiakang Sung, Bonnie I Wang: Logic region resources for programmable logic devices. Altera Corporation, Robert R Jackson, Fish & Neave, December 7, 1999: US05999015 (89 worldwide citation)

A programmable logic device has subregions of programmable logic grouped together in logic regions. The subregions in each region share several control signals, which can be selected either from relatively global conductors on the device or from data inputs to the region. The control signals allow s ...


6
Richard G Cliff, Francis B Heile, Joseph Huang, Fung Fung Lee, Cameron McClintock, David W Mendel, Bruce B Pedersen, Srinivas T Reddy, Chiakang Sung, Kerry Veenstra, Bonnie I Wang: Programmable logic device architectures. Altera Corporation, Robert R Jackson, Fish & Neave, November 9, 1999: US05982195 (82 worldwide citation)

A programmable logic device has regions of programmable logic disposed on the device in a two-dimensional array of intersecting rows and columns of such regions. Horizontal interconnection conductors are associated with each row, and vertical interconnection conductors are associated with each colum ...


7
Bonnie I Wang, Chiakang Sung, Yan Chong, Philip Pan, Khai Nguyen, Joseph Huang, Xiaobao Wang, In Whan Kim, Gopinath Rangan: Programmable logic integrated circuit devices with differential signaling capabilities. Altera Corporation, Jeffrey H Ingerman, Fish & Neave, August 13, 2002: US06433579 (81 worldwide citation)

A programmable logic device is equipped for various differential signaling schemes by providing a differential output buffer on the device that can be configured according to the needs of the particular differential signaling schemes that may be used. The buffer includes a differential output driver ...


8
Richard G Cliff, Francis B Heile, Joseph Huang, Christopher F Lane, Fung Fung Lee, Cameron McClintock, David W Mendel, Ninh D Ngo, Bruce B Pedersen, Srinivas T Reddy, Chiakang Sung, Kerry Veenstra, Bonnie I Wang: Programmable logic array integrated circuit devices with interleaved logic array blocks. Altera Corporation, Robert R Jackson, Douglas A Cardwell, Fish & Neave, June 1, 1999: US05909126 (75 worldwide citation)

A programmable logic array integrated circuit device includes a plurality of regions of programmable logic disposed on the device in a two-dimensional array of intersecting rows and columns of such regions. Each row has a plurality of adjacent horizontal conductors, and each column has a plurality o ...


9
Khai Nguyen, Xiaobao Wang, In Whan Kim, Chiakang Sung, Richard G Cliff, Joseph Huang, Bonnie I Wang, Wayne Yeung: Programmable logic integrated circuit devices with low voltage differential signaling capabilities. Altera Corporation, Robert R Jackson, Khue V Hoang, Fish & Neave, May 22, 2001: US06236231 (69 worldwide citation)

A programmable logic device is equipped for low voltage differential signaling (“LVDS”) by providing an LVDS input buffer and/or an LVDS output buffer on the device. I/O pins on the device that are used together in pairs for LVDS can alternatively be used individually for other types of signaling. T ...


10
Richard G Cliff, L Todd Cope, Cameron R McClintock, William Leong, James A Watson, Joseph Huang, Bahram Ahanin: Programmable logic array integrated circuits. Altera Corporation, Townsend and Townsend and Crew, October 17, 2000: US06134173 (67 worldwide citation)

A programmable logic array integrated circuit has a number of programmable logic modules which are grouped together in a plurality of logic array blocks ("LABs"). The LABs are arranged on the circuit in a two dimensional array. A conductor network is provided for interconnecting any logic module wit ...