1
Daniel L Auclair, Jeffrey Craig, John S Mangan, Robert D Norman, Daniel C Guterman, Sanjay Mehrotra: Soft errors handling in EEPROM devices. SanDisk Corporation, Majestic Parsons Siebert & Hsue, August 12, 1997: US05657332 (492 worldwide citation)

Soft errors occur during normal use of a solid-state memory such as EEPROM or Flash EEPROM. A soft error results from the programmed threshold voltage of a memory cell being drifted from its originally intended level. The error is initially not readily detected during normal read until the cumulativ ...


2
Daniel L Auclair, Jeffrey Craig, John S Mangan, Robert D Norman, Daniel C Guterman, Sanjay Mehrotra: Soft errors handling in EEPROM devices. SanDisk Corporation, Majestic Parsons Siebert & Hsue, July 2, 1996: US05532962 (400 worldwide citation)

Soft errors occur during normal use of a solid-state memory such as EEPROM or Flash EEPROM. A soft error results from the programmed threshold voltage of a memory cell being drifted from its originally intended level. The error is initially not readily detected during normal read until the cumulativ ...


3
Kevin M Conley, John S Mangan, Jeffrey G Craig: Flash eeprom system with simultaneous multiple data sector programming and storage of physical block characteristics in other designated blocks. Sandisk Corporation, Skjerven Morrill, July 30, 2002: US06426893 (388 worldwide citation)

A non-volatile memory system is formed of floating gate memory cells arranged in blocks as the smallest unit of memory cells that are erasable together. The system includes a number of features that may be implemented individually or in various cooperative combinations. One feature is the storage in ...


4
Eliyahou Harari, Daniel C Guterman, Sanjay Mehrotra, Stephen J Gross, John S Mangan: Streamlined write operation for EEPROM system. SunDisk Corporation, Majestic Parsons Siebert & Hsue, March 7, 1995: US05396468 (198 worldwide citation)

Various optimizing techniques are used for erasing semiconductor electrically erasable programmable read only memories (EEPROM). An erase algorithm accomplishes erasing of a group of memory cells by application of incremental erase pulses. Techniques include a 2-phase verification process interleavi ...


5
John S Mangan, Robert D Norman, Jeffrey Craig, Richard Albert, Anil Gupta, Jeffrey D Stai, Karl M J Lofgren: Flash EEPROM array data and header file structure. SunDisk Corporation, Western Digital Corporation, Majestic Parsons Siebert & Hsue, August 1, 1995: US05438573 (128 worldwide citation)

A file structure employed in a flash electrically erasable and programmable read only memory ("EEPROM") system and aspects of forming and using certain data fields within such a file structure. An array of rows and columns of EEPROM memory cells is divided into blocks of cells that are separately ad ...


6
John S Mangan, Robert D Norman, Jeffrey Craig, Richard Albert, Anil Gupta, Jeffrey D Stai, Karl M J Lofgren: Flash EEPROM array data and header file structure. SunDisk Corporation, Western Digital Corporation, Majestic Parsons Siebert & Hsue, November 28, 1995: US05471478 (107 worldwide citation)

A file structure employed in a flash electrically erasable and programmable read only memory ("EEPROM") system and aspects of forming and using certain data fields within such a file structure. An array of rows and columns of EEPROM memory cells is divided into blocks of cells that are separately ad ...


7
John S Mangan, Daniel C Guterman, George Samachisa, Brian Murphy, Chi Ming Wang: Method of reducing disturbs in non-volatile memory. SanDisk Corporation, Parsons Hsue & de Runtz, May 27, 2003: US06570785 (85 worldwide citation)

In a non-volatile memory, the displacement current generated in non-selected word lines that results when the voltage levels on an array's bit lines are changed can result in disturbs. Techniques for reducing these currents are presented. In a first aspect, the number of cells being simultaneou ...


8
John S Mangan, Daniel C Guterman, George Samachisa, Brian Murphy, Chi Ming Wang, Khandker N Quader: Method of reducing disturbs in non-volatile memory. SanDisk Corporation, Parson Hsue & de Runtz, April 6, 2004: US06717851 (71 worldwide citation)

In a non-volatile memory, the displacement current generated in non-selected word lines that results when the voltage levels on an array's bit lines are changed can result in disturbs. Techniques for reducing these currents are presented. In a first aspect, the number of cells being simultaneou ...


9
Kevin M Conley, John S Mangan, Jeffrey G Craig: Flash EEPROM system with simultaneous multiple data sector programming and storage of physical block characteristics in other designated blocks. SanDisk Corporation, Parsons Hsue & de Runtz, July 6, 2004: US06760255 (52 worldwide citation)

A non-volatile memory system is formed of floating gate memory cells arranged in blocks as the smallest unit of memory cells that are erasable together. The system includes a number of features that may be implemented individually or in various cooperative combinations. One feature is the storage in ...


10
Daniel L Auclair, Jeffrey Craig, John S Mangan, Robert D Norman, Daniel C Guterman, Sanjay Mehrotra: Soft errors handling in EEPROM devices. Zilog, Majestic Parsons Siebert & Hsue, April 11, 2000: US06049899 (41 worldwide citation)

Soft errors occur during normal use of a solid-state memory such as EEPROM or Flash EEPROM. A soft error results from the programmed threshold voltage of a memory cell being drifted from its originally intended level. The error is initially not readily detected during normal read until the cumulativ ...