1
Justin Abramson, Karl R Amundson, Guy M Danner, Gregg M Duthaler, Holly G Gates, Charles H Honeyman, Ara N Knaian, Ian D Morrison, Steven J O Neil, Richard J Paolini Jr, Anthony Edward Pullen, Jianna Wang, Jonathan L Zalesky, Robert W Zehner, John Edward Cronin: Electro-optic displays, and methods for driving same. E Ink Corporation, David J Cole, September 27, 2005: US06950220 (260 worldwide citation)

The invention relates to electro-optic displays and methods for driving such displays. The invention provides (i) electrochromic displays with solid charge transport layers; (ii) apparatus and methods for improving the contrast and reducing the cost of electrochromic displays; (iii) apparatus and me ...


2
Claude Louis Bertin, John Edward Cronin: Programmable logic array. International Business Machines Corporation, Wayne F Reinke Esq, Heslin& Rothenberg P C, July 14, 1998: US05781031 (192 worldwide citation)

A programmable logic array (PLA) includes two direct-write EEPROM arrays, and PLA logic circuitry, such as feedback, drivers and input and output circuitry. One EEPROM array acts as an AND array and the other acts as n OR array. The PLA can be used for a memory function or a PLA function. In one asp ...


3
Claude Louis Bertin, John Edward Cronin: Chip function separation onto separate stacked chips. International Business Machines Corporation, Wayne F Reinke Esq, Heslin & Rothenberg P C, October 6, 1998: US05818748 (148 worldwide citation)

The high-voltage drivers and decoders of a direct-write EEPROM memory array are separated from the word lines and placed onto separate stacked chips. The separate chips are stacked face-to-face, and force-responsive self-interlocking microconnectors are used to physically and electrically connect th ...


4
John Edward Cronin, Wayne John Howell, Howard Leo Kalter, Patricia Ellen Marmillion, Anthony Palagonia, Bernadette Ann Pierson, Dennis Arthur Schmidt: Methods for precise definition of integrated circuit chip edges. International Business Machines Corporation, Heslin & Rothenberg P C, November 25, 1997: US05691248 (131 worldwide citation)

Integrated Circuit ("IC") chips are formed with precisely defined edges and sizing. At the wafer processing level, trenches are lithographically etched in the kerf regions to define the edges of the IC chips on the wafer. The trenches are filled with insulating material, and upper level wiring and m ...


5
Kenneth Edward Beilstein Jr, Claude Louis Bertin, John Edward Cronin, Francis Roger White: Three-dimensional SRAM trench structure and fabrication method therefor. International Business Machines Corporation, Heslin & Rothenberg P C, September 23, 1997: US05670803 (97 worldwide citation)

A three-dimensional five transistor SRAM trench structure and fabrication method therefor are set forth. The SRAM trench structure includes four field-effect transistors ("FETs") buried within a single trench. Specifically, two FETs are located at each of two sidewalls of the trench with one FET bei ...


6
John Edward Cronin: Integrated circuit chip wiring structure with crossover capability and method of manufacturing the same. International Business Machines Corporation, Steven J Soucar, Schmeiser Olsen & Watts, October 6, 1998: US05818110 (86 worldwide citation)

An integrated circuit chip wiring structure having crossover and contact capability without an interlock via layer and a method of making the wiring structure all disclosed. The method utilizes a multi-damascene approach, using the standard damascene processing steps to wire the first, then metalliz ...


7
John Edward Cronin, Michael David Potter, Gorden Seth Starkey: Method for etching vertical contact holes without substrate damage caused by directional etching. International Business Machines Corporation, Howard J Walter Jr, Whitham Curtis Whitham & McGinn, August 5, 1997: US05654238 (79 worldwide citation)

A method of etching vias without directional etching damage to the substrate. A pattern image is formed on an insulating layer of known thickness over a substrate. A conformal layer is formed on the pattern image. A vertical contact hole through the conformal layer and into the insulating layer is p ...


8
Kenneth Edward Beilstein Jr, Claude Louis Bertin, John Edward Cronin, Wayne John Howell, James Marc Leas, David Jacob Perlman: Method and workpiece for connecting a thin layer to a monolithic electronic modules surface and associated module packaging. International Business Machines Corporation, Heslin & Rothenberg P C, July 28, 1998: US05786628 (58 worldwide citation)

A fabrication method and resultant monolithic electronic module having a separately formed thin-film layer attached to a side surface. The fabrication method includes providing an electronic module composed of stacked integrated circuit chips. A thin-film layer is separately formed on a temporary su ...


9
John Edward Cronin, Stephen Ellinwood Luce, Steven Howard Voldman: Method for forming semiconductor chip and electronic module with integrated surface interconnects/components. International Business Machines Corporation, Heslin & Rothenberg P C, August 5, 1997: US05654221 (47 worldwide citation)

A fabrication method and resultant electronic module having one or more surfaces enhanced with interconnects and components. Electronic modules having, for example, resistors and capacitors integral with a side surface thereof are disclosed. Further described are electronic modules with interconnect ...


10
Kenneth Edward Beilstein Jr, Claude Louis Bertin, John Edward Cronin, Wayne John Howell, James Marc Leas, David Jacob Perlman: Method and workpiece for connecting a thin layer to a monolithic electronic modules surface and associated module packaging. International Business Machines Corporation, Heslin & Rothenberg P C, February 17, 1998: US05719438 (43 worldwide citation)

A fabrication method and resultant monolithic electronic module having a separately formed thin-film layer attached to a side surface. The fabrication method includes providing an electronic module composed of stacked integrated circuit chips. A thin-film layer is separately formed on a temporary su ...