1
Rebecca L Stamm, John Edmondson, David Archer, Samyojita Nadkarni, Raymond Strouble: Processor system with writeback cache using writeback and non writeback transactions stored in separate queues. Digital Equipment Corporation, Richard J Paciulan, Denis G Maloney, May 31, 1994: US05317720 (114 worldwide citation)

A pipelined CPU executing instructions of variable length, and referencing memory using various data widths. A writeback cache is used (instead of writethrough) in a hierarchical cache arrangement, and writeback is allowed to proceed even though other accesses are suppressed due to queues being full ...


2
Gregory G Carlson, Heather Davis, John Edmondson Norvell IV, Kevin Lee Zierath, Chandra S Vemulapalli, Vidhyaprakash Ramachandran: Method, system and program product for viewing and manipulating graphical objects representing hierarchically arranged elements of a modeled environment. MCI, November 28, 2006: US07143100 (38 worldwide citation)

A data model of a modeled environment is maintained within a database. The data model includes data defining a plurality of hierarchically arranged subsets of space within the modeled environment and data defining a plurality of items populating the modeled environment. A data processing system disp ...


3
David B Glasco, Peter B Holmqvist, George R Lynch, Patrick R Marchand, James Roberts, John Edmondson: System and method for cleaning dirty data in an intermediate cache using a data class dependent eviction policy. NVIDIA Corporation, Patterson & Sheridan, August 14, 2012: US08244984 (25 worldwide citation)

In one embodiment, a method for managing information related to dirty data stored in an intermediate cache coupled to one or more clients and to an external memory includes receiving a dirty data notification related to dirty data residing in the intermediate cache, the dirty data notification inclu ...


4
Christopher Mouskis, Bryan John Edmondson: Drogue assembly for in-flight refueling. Flight Refueling, Finnegan Henderson Farabow Garrett Dunner L, November 14, 2000: US06145788 (24 worldwide citation)

A drogue assembly (10) for in flight refueling includes a circumferenal array of triangular support arms which carry a drogue parachute (29) which extends circumferentially around their shorter sides. Each support arm is pivoted and mounted on a pivot pin (19) at its apex for pivotal movement in a r ...


5
Bruno Suri, Catherine Georges, John Edmondson Peel: Method for the prevention and treatment of mastitis. Novartis Animal Health U S, Michael P Morris, William A Teoli Jr, February 13, 2001: US06187800 (12 worldwide citation)

A method for treating or preventing mastitis in mammals is disclosed. The method contemplates the intramammary injection or dipping the teat with micrococcin antibiotics, preferably micrococcin P1 or P2, which do not interfere with the production of cheese and yoghurt using milk from treated animals ...


6
Shu Yi Yu, Shane Keil, John Edmondson: Memory-based error recovery. Nvidia Corporation, Clise Billion & Cyr P A, Richard E Billion, January 29, 2013: US08365015 (11 worldwide citation)

The present disclosure provides memory level error correction methods and apparatus. A memory controller is intermediate the memory devices, such as DRAM chips or memory modules, and a processor, such a graphics processor or a main processor. The memory controller can provide error correction. In an ...


7
William C Anderson, John Edmondson, Jose Fridman, Marc Hoffman, Russell L Rivin: Digital signal processor computation core with input operand selection from operand bus for dual operations. Analog Devices, Wolf Greenfield & Sacks P C, September 19, 2006: US07111155 (9 worldwide citation)

A computation core includes a computation block, an addressing block and an instruction sequencer, which are coupled to a memory through a memory interface. The computation block includes a register file and dual execution units. The execution units include features for enhanced performance in execu ...


8
John Edmondson, Scott Taylor: Method for testing an on-chip cache for repair. Digital Equipment Corporation, Joanne N Pappas, Gary E Ross, Arthur W Fisher, October 21, 1997: US05680544 (8 worldwide citation)

A test system is provided which tests the on chip cache of a microprocessor (CPU). The test system provides test vectors to the CPU in a specified sequences. The CPU then uses its internal general purpose registers to write the vectors the cache memory locations. After writing, the data is read back ...


9
William J Dally, John Edmondson, Donald A Priore, Ephrem Wu, John W Poulton: Architectures for a single-stage grooming switch. LSI Logic Corporation, Hamilton Brook Smith & Reynolds P C, October 19, 2004: US06807186 (8 worldwide citation)

A single-stage grooming switch is provided for switching streams of multiplexed traffic, such as SONET STS-48, in both time and space domains. In particular, the switch implements a distributed demultiplexing architecture for switching between any input timeslot to any output timeslot at a reduced l ...


10
Gregory G Carlson, Heather Davis, John Edmondson Norvell IV, Kevin Lee Zierath, Chandra S Vemulapalli, Vidhyaprakash Ramachandran: Method, system and program product for generating scenarios utilizing graphical objects representing hierarchically arranged elements of a modeled environment. Verizon Business Global, January 8, 2008: US07318015 (4 worldwide citation)

A data model of a modeled environment is maintained within a database. The data model includes data defining a plurality of hierarchically arranged subsets of space within the modeled environment and data defining a plurality of items populating the modeled environment. In response to a first user i ...