1
Jochen Thomas, Olaf Schoenfeld: Multi-chip device and method for producing a multi-chip device. Infineon Technologies, Patterson & Sheridan L, November 20, 2007: US07297574 (235 worldwide citation)

The present invention relates to a multi-chip device comprising a plurality of chip stacks each including a plurality of single chips stacked on each other, wherein the stacked single chips are electrically interconnected by one or more through-chip-connection extending through at least one of the s ...


2
Wolfgang Hetzel, Anton Legen, Jochen Thomas: Electronic device having a stack of semiconductor chips and method for the production thereof. Infineon Technologies, Dicke Billig & Czaja PLLC, May 17, 2005: US06894381 (53 worldwide citation)

The invention relates to an electronic device having a stack of semiconductor chips, and to a method for the production thereof. A first semiconductor chip is arranged on a rewiring substrate, and at least one semiconductor stack chip is arranged on the first semiconductor chip. A rewiring plane is ...


3
Jochen Thomas, Wolfgang Hetzel: Stack arrangement of a memory module. Infineon Technologies, Slater & Matsil L, August 9, 2005: US06927484 (14 worldwide citation)

A stack arrangement of discrete components includes a carrier substrate and at least two discrete components, e.g., memory chips. The carrier substrate has line conductor structures and contact pads. Each of the discrete components includes centrally disposed bond pads and a metallic coating, which ...


4
Minka Gospodinova, Jochen Thomas, Dominique Savignac: Integrated circuit chip and integrated device. Infineon Technologies, Patterson & Sheridan L, November 25, 2008: US07456505 (13 worldwide citation)

Embodiments provide for integrated circuit chip and device having such an integrated circuit, in which different types of pads are arranged in separate rows. In one embodiment the pads are arranged to reduce the loop inductance of corresponding signal and power supply bond wires.


5
Jochen Thomas, Peter Weitz, Jurgen Grafe, Harry Hedler, Jens Pohl: Integrated circuit with re-route layer and stacked die assembly. Infineon Technologies, Slater & Matsil L, September 9, 2008: US07422930 (12 worldwide citation)

An apparatus and a method of manufacture for a stacked-die assembly. A first die is placed on a substrate such that the backside of the die, i.e., the side opposite the side with the bond pads, is coupled to the substrate, preferably by an adhesive. Wire leads electrically couple the bond pads of th ...


6
Jochen Thomas, Wolfgang Hetzel: Multi-chip device and method for producing a multi-chip device. Infineon Technologies, Patterson & Sheridan L, July 22, 2008: US07402911 (11 worldwide citation)

The present invention relates to a multi-chip device comprising a substrate having a first surface on which a number of first contact elements is provided, a plurality of integrated circuit chips arranged in a chip stack which is arranged on a second surface of the substrate opposing the first surfa ...


7
Ingo Wennemuth, Jochen Thomas: Electronic component with stacked electronic elements. Infineon Technologies, Laurence A Greenberg, Werner H Stemer, Ralph E Locher, July 27, 2004: US06768191 (10 worldwide citation)

An electronic component includes stacked electronic elements with external contacts. The external contacts are connected to contact terminal pads of an interconnect layer disposed on an isolating body. This isolating body extends over underlying side edges of a further electronic element, and its in ...


8
Jurgen Grafe, Sylke Ludewig, Jochen Thomas, Peter Weitz: Semiconductor module having an internal semiconductor chip stack, and method for producing said semiconductor module. Infineon Technologies, Dicke Billig Czaja PLLC, April 1, 2008: US07352057 (9 worldwide citation)

A semiconductor module having an internal semiconductor chip stack on a wiring substrate is disclosed. In one embodiment, the semiconductor chip stack has semiconductor chips which are arranged such that they are offset, the semiconductor chips having bonding connection pads in at least one edge reg ...


9
Jochen Thomas, Peter Weitz, Jurgen Grafe, Harry Hedler, Jens Pohl: Integrated circuit with re-route layer and stacked die assembly. Qimonda, John S Economou, May 24, 2011: US07948071 (7 worldwide citation)

An apparatus and a method of manufacture for a stacked-die assembly. A first die is placed on a substrate such that the backside of the die, i.e., the side opposite the side with the bond pads, is coupled to the substrate, preferably by an adhesive. Wire leads electrically couple the bond pads of th ...


10
Jochen Thomas, Wolfgang Hetzel, Ingo Wennemuth: Method for manufacturing a stack arrangement of a memory module. Infineon Technologies, Slater & Matsil L, April 3, 2007: US07198979 (6 worldwide citation)

A method of stacking semiconductor chips includes providing four semiconductor chips that each include a top surface with central bond pads. Each of the bond pads is electrically coupled to second bond pads located in a peripheral portion of the semiconductor chip through a conductive layer. The fir ...