1
Christian Boemler, Jeffrey J Zarnowski: Image sensor ADC and CDS per column. Silicon Video, Bernhard P Molldrem Jr, November 15, 2005: US06965407 (42 worldwide citation)

A solid state imager includes an arrangement for converting analog pixel values to digital form on an arrayed per-column basis. An N-bit counter supplies an N-bit DAC to produce an analog ramp output providing a ramp signal with a level that varies corresponding to the contents of the counter. Latch ...


2
Matthew A Pace, Jeffrey J Zarnowski: Complimentary metal oxide semiconductor imaging device. Photon Vision Systems, Stephen B Salai, Harter Secrest & Emery, July 4, 2000: US06084229 (33 worldwide citation)

A CMOS imager includes a photosensitive device such as a photosensitive device such as a photodiode or photogate having a sense node coupled to an FET located adjacent to the photosensitive region. Another FET, forming a differential input pair of an operational amplifier is located outside of the a ...


3
Terry Lee Zarnowski, Jeffrey J Zarnowski, Iain A Neil: Method and apparatus for controlling a lens, and camera module incorporating same. Panavision Imaging, Morrison & Foerster, November 10, 2009: US07616877 (27 worldwide citation)

An efficient image capture system is disclosed that integrates functions to control a lens including one or more of focus or object distance, zoom, temperature compensation, and stabilization within an image signal processor (ISP) with appropriate algorithms. In particular, the integrated ISP circui ...


4
Jeffrey J Zarnowski, Ketan V Karia, Michael Joyner, Thomas Poonnen, Li Liu: Scanning imager employing multiple chips with staggered pixels. Panavision Imaging, Bernhard P Molldrem Jr, June 30, 2009: US07554067 (23 worldwide citation)

A solid state imaging system has at least one CMOS imager with first and second series of pixels in which the pixels of one series are offset, i.e., staggered, in respect to the pixels of the other series. Multiple imagers can be arrayed end to end, with jumper wires connecting the pixel output cond ...


5
Thomas Poonnen, Jeffrey J Zarnowski, Li Liu, Michael Joyner, Ketan V Karia: Image sensor ADC and CDS per column with oversampling. Panavision Imaging, Bernhard P Molldrem Jr, May 1, 2012: US08169517 (11 worldwide citation)

A solid state imager converts analog pixel values to digital form on an arrayed per-column basis. An N-bit counter supplies an N-bit DAC to produce an analog ramp output with a level that varies corresponding to the contents of the counter. A latch/counter or equivalent is associated with each respe ...


6
Jeffrey J Zarnowski, Matthew A Pace: Photo receptor with reduced noise. Photon Vision Systems, Stephen B Salai Esq, Joseph M Young Esq, Harter Secrest & Emery, February 27, 2001: US06194770 (10 worldwide citation)

An improved low voltage, small surface area, high signal-to-noise ratio photo gate includes a layer of photoreceptive semiconductor material having an impurity concentration selected to enhance the formation of hole electron pairs in response to photons impinging on a surface of the substrate, an el ...


7
Joseph Carbone, M Bonner Denton, Stephen W Czebiniak, Jeffrey J Zarnowski, Steven N VanGorden, Michael J Pilon: Collective charge reading and injection in random access charge transfer devices. CID Technologies, Fish & Richardson P C, February 10, 1998: US05717199 (9 worldwide citation)

Random access charge transfer devices are provided in which it is possible to simultaneously read electric charge that is stored within each detection element (pixel) that is in one of any desired combination of columns and that is also in one of any desired combination of rows. It is also possible ...


8
Jeffrey J Zarnowski, Ketan V Karia, Thomas Poonnen: Image sensor ADC and CDS per column. Panavision Imaging, Bernhard P Molldrem Jr, April 14, 2009: US07518646 (8 worldwide citation)

A solid state imager converts analog pixel values to digital form on an arrayed per-column basis. An N-bit counter supplies an N-bit DAC to produce an analog ramp output with a level that varies corresponding to the contents of the counter. A ripple counter or equivalent is associated with each resp ...


9
Jeffrey J Zarnowski, Samuel D Ambalavanar, Michael E Joyner, Ketan V Karia: Solid state imager with reduced number of transistors per pixel. Panavision Imaging, Bernhard P Molldrem Jr, June 6, 2006: US07057150 (8 worldwide citation)

A solid state imager with pixels arranged in columns and rows has the pixels are configured into groups of at least a first pixel and a second pixel, each said group sharing a pixel output transistor having a sense electrode and an output electrode and a reset transistor having a gate coupled to rec ...


10
Jeffrey J Zarnowski, Ketan V Karia, Michael Joyner, Thomas Poonnen: Scanning imager employing multiple chips with staggered pixels. Panavision Imaging, Bernhard P Molldrem Jr, October 31, 2006: US07129461 (5 worldwide citation)

A solid state imaging system has at least one CMOS imager with first and second series of pixels in which the pixels of one series are offset, i.e., staggered, in respect to the pixels of the other series. Multiple imagers can be arrayed end to end, with jumper wires connecting the pixel output cond ...