1
Stuart Mcallister Burns Jr, Hussein Ibrahim Hanafi, Jeffrey J Welser, Waldemar Walter Kocon, Howard Leo Kalter: Self-aligned diffused source vertical transistors with stack capacitors in a 4F-square memory cell array. International Business Machines Corporation, Manny W Schecter Esq, Scully Scott Murphy & Presser, June 20, 2000: US06077745 (143 worldwide citation)

A densely packed array of vertical semiconductor devices, having pillars with stack capacitors thereon, and methods of making thereof are disclosed. The pillars act as transistor channels, and are formed between upper and lower doped regions. The lower doped regions are self-aligned and are located ...


2
Toshiharu Furukawa, Mark C Hakey, Steven J Holmes, David V Horak, Howard L Kalter, Jack A Mandelman, Paul A Rabidoux, Jeffrey J Welser: Structure for folded architecture pillar memory cell. International Business Machines Corporation, Mark F Chadurjian, Scully Scott Murphy & Presser, August 27, 2002: US06440801 (107 worldwide citation)

A densely packed array of vertical semiconductor devices having pillars and methods of making thereof are disclosed. The array has rows of wordlines and columns of bitlines. The array has vertical pillars, each having two wordlines, one active and the other passing for each, cell. Two wordlines are ...


3
Stuart Mcallister Burns Jr, Hussein Ibrahim Hanafi, Jeffrey J Welser, Waldemar Walter Kocon: 4F-square memory cell having vertical floating-gate transistors with self-aligned shallow trench isolation. International Business Machines Corporation, Manny W Schecter, Scully Scott Murphy & Presser, February 23, 1999: US05874760 (98 worldwide citation)

A densely packed array of vertical semiconductor devices and methods of making thereof are disclosed. The array has columns of bitlines and rows of wordlines. The gates of the transistors act as the wordlines, while the source or drain regions acts as the bitlines. The array also has vertical pillar ...


4
Stuart McAllister Burns Jr, Hussein Ibrahim Hanafi, Jeffrey J Welser, Waldemar Walter Kocon, Howard Leo Kalter: Self-aligned diffused source vertical transistors with stack capacitors in a 4F-square memory cell array. International Business Machines Corporation, Manny W Schecter, Scully Scott Murphy & Presser, July 27, 1999: US05929477 (89 worldwide citation)

A densely packed array of vertical semiconductor devices, having pillars with stack capacitors thereon, and methods of making thereof are disclosed. The pillars act as transistor channels, and are formed between upper and lower doped regions. The lower doped regions are self-aligned and are located ...


5
Stuart Mcallister Burns Jr, Hussein Ibrahim Hanafi, Howard Leo Kalter, Jeffrey J Welser, Waldemar Walter Kocon: Self-aligned diffused source vertical transistors with deep trench capacitors in a 4F-square memory cell array. International Business Machines Corporation, Manny W Schecter Esq, Scully Scott Murphy & Presser, March 7, 2000: US06034389 (74 worldwide citation)

A densely packed array of vertical semiconductor devices, having pillars and deep trench capacitors, and methods of making thereof are disclosed. The pillars act as transistor channels, and are formed between upper and lower doped regions. The lower doped regions are self-aligned and are located bel ...


6
Toshiharu Furukawa, Mark C Hakey, Steven J Holmes, David V Horak, Howard L Kalter, Jack A Mandelman, Paul A Rabidoux, Jeffrey J Welser: Structure for folded architecture pillar memory cell. International Business Machines Corporation, Eugene I Shkurko Esq, Scully Scott Murphy & Presser, September 5, 2000: US06114725 (66 worldwide citation)

A densely packed array of vertical semiconductor devices having pillars and methods of making thereof are disclosed. The array has rows of wordlines and columns of bitlines. The array has vertical pillars, each having two wordlines, one active and the other passing for each cell. Two wordlines are f ...


7
Stuart Mcallister Burns Jr, Hussein Jbrahim Hanafi, Jeffrey J Welser: 2F-square memory cell for gigabit memory applications. International Business Machines Corporation, Daryl K Neff, November 23, 1999: US05990509 (62 worldwide citation)

A densely packed array of vertical semiconductor devices having pillars and methods of making thereof are disclosed. The array has columns of bitlines and rows of wordlines. The gates of the transistors act as the wordlines, while the source or drain regions acts as the bitlines. The array also has ...


8
Stuart Mcallister Burns Jr, Hussein Ibrahim Hanafi, Howard Leo Kalter, Jeffrey J Welser, Waldemar Walter Kocon: Self-aligned diffused source vertical transistors with deep trench capacitors in a 4F-square memory cell array. International Business Machines Corporation, Manny W Schecter, Scully Scott Murphy & Presser, January 11, 2000: US06013548 (50 worldwide citation)

A densely packed array of vertical semiconductor devices, having pillars and deep trench capacitors, and methods of making thereof are disclosed. The pillars act as transistor channels, and are formed between upper and lower doped regions. The lower doped regions are self-aligned and are located bel ...


9
Stuart Mcallister Burns Jr, Hussein Ibrahim Hanafi, Jeffrey J Welser, Waldemar Walter Kocon: 4F-square memory cell having vertical floating-gate transistors with self-aligned shallow trench isolation. International Business Machines Corporation, Manny W Schecter Esq, Scully Scott Murphy & Presser, March 7, 2000: US06033957 (45 worldwide citation)

A densely packed array of vertical semiconductor devices and methods of making thereof are disclosed. The array has columns of bitlines and rows of wordlines. The gates of the transistors act as the wordlines, while the source or drain regions acts as the bitlines. The array also has vertical pillar ...


10
Farid Agahi, Bardia Pezeshki, Jeffrey A Kash, Jeffrey J Welser: Wavelength-selective devices using silicon-on-insulator. International Business Machines Corporation, Douglas W Cameron, September 24, 1996: US05559912 (34 worldwide citation)

This invention describes how commercial silicon-on-insulator material can be used to fabricate both wavelength filters and wavelength-selective photodetectors. The silicon-on-insulator substrates have a buried silicon dioxide layer and a thin top silicon layer and are manufactured for high speed ele ...