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Eb Eshun
Anil K Chinthakindi, Douglas D Coolbaugh, Ebenezer E Eshun, Zhong Xiang He, Jeffrey B Johnson, Jonghae Kim, Jean Oliver Plouchart, Anthony K Stamper: Passive components in the back end of integrated circuits. International Business Machines Corporation, Anthony J Canale, August 3, 2010: US07768055 (10 worldwide citation)

Passive components are formed in the back end by using the same deposition process and materials as in the rest of the back end. Resistors are formed by connecting in series individual structures on the nth, (n+1)th, etc levels of the back end. Capacitors are formed by constructing a set of vertical ...


2
Eb Eshun
Ebenezer E Eshun, Jeffrey B Johnson, Richard A Phelps, Robert M Rassel, Michael J Zierak: Junction field effect transistor with a hyperabrupt junction. International Business Machines Corporation, Scully Scott Murphy & Presser P C, Richard Kotulak Esq, November 2, 2010: US07825441 (3 worldwide citation)

A junction field effect transistor (JFET) has a hyperabrupt junction layer that functions as a channel of a JFET. The hyperabrupt junction layer is formed by two dopant profiles of opposite types such that one dopant concentration profile has a peak concentration depth at a tail end of the other dop ...


3
Eb Eshun
Anil K Chinthakindi, Douglas D Coolbaugh, Ebenezer E Eshun, Zhong Xiang He, Jeffrey B Johnson, Jonghae Kim, Jean Oliver Plouchart, Anthony K Stamper: Passive components in the back end of integrated circuits. International Business Machines Corporation, Anthony J Canale, October 18, 2011: US08039354 (3 worldwide citation)

Passive components are formed in the back end by using the same deposition process and materials as in the rest of the back end. Resistors are formed by connecting in series individual structures on the nth, (n+1)th, etc levels of the back end. Capacitors are formed by constructing a set of vertical ...


4
James W Adkisson, Arne W Ballantine, Ramachandra Divakaruni, Jeffrey B Johnson, Erin C Jones, Hon Sum P Wong: Method for making multiple threshold voltage FET using multiple work-function gate materials. International Business Machines Corporation, Robert Curcio, Richard A Henkler, DeLio & Peterson, September 28, 2004: US06797553 (98 worldwide citation)

A shorter gate length FET for very large scale integrated circuit chips is achieved by providing a wafer with multiple threshold voltages. Multiple threshold voltages are developed by combining multiple work function gate materials. The gate materials are geometrically aligned in a predetermined pat ...


5
Arthur B Ish III, Jeffrey B Johnson: Exercise machine with multiple exercise stations. Seed and Berry, February 13, 1990: US04900018 (70 worldwide citation)

An exercise machine has multiple stations at each of which two or more exercises are performed in opposition to a selected amount of weight in a weight stack. A cable and pulley system connects the exercise apparatus at the exercise stations with the weight stack in such a manner that only one pull ...


6
Robert A Rasmussen, Jeffrey B Johnson, William D MacLean, Arthur B Ish III: Exercise machine with multiple exercise stations. R A Rasmussen, W D MacLean, Seed and Berry, March 7, 1989: US04809972 (48 worldwide citation)

An exercise machine has multiple stations at each of which two or more exercises are performed in opposition to a selected amount of weight in a weight stack. A cable and pulley system connects the exercise apparatus at the exercise stations with the weight stack in such a manner that only one pull ...


7
Jeffrey B Johnson, Chung H Lam, Dana Lee, Dale W Martin, Jed H Rankin: Self-aligned non-volatile random access memory cell and process to make the same. International Business Machines Corporation, Silicon Storage Technologies, Mark F Chadurjian Esq, McGinn & Gibb PLLC, February 25, 2003: US06525371 (48 worldwide citation)

A self aligned method of forming a semiconductor memory array of floating gate memory cells in a semiconductor substrate has a plurality of spaced apart isolation regions on the substrate substantially parallel to one another. An active region is between each pair of adjacent isolation regions. The ...


8
Stephen S Furkay, Hendrick Hamann, Jeffrey B Johnson, Chung H Lam, Hon Sum P Wong: Phase change memory cell on silicon-on insulator substrate. International Business Machines Corporation, Scully Scott Murphy & Presser, Anthony Canale, February 28, 2006: US07005665 (32 worldwide citation)

The present invention includes a method for forming a phase change material memory device and the phase change memory device produced therefrom. Specifically, the phase change memory device includes a semiconductor structure including a substrate having a first doped region flanked by a set of secon ...


9
Terence B Hook, Jeffrey B Johnson, Hon Sum P Wong: Method of forming a complementary active pixel sensor cell. International Business Machines Corporation, Peter W Peterson, Eugene I Shkurko, DeLio & Peterson, February 27, 2001: US06194702 (21 worldwide citation)

The present invention is a complementary active pixel sensor cell and method of making and using the same. The complementary active pixel sensor cell approximately doubles the available signal for a given quanta of light. The device of the present invention utilizes the holes produced by impinging p ...


10
Terence B Hook, Jeffrey B Johnson, Hon Sum P Wong: Active pixel sensor cell and method of using. International Business Machines Corporation, Geza C Ziegler Jr, Eugene I Shkurko, Delio & Peterson, February 22, 2000: US06026964 (21 worldwide citation)

The present invention is a active pixel sensor cell and method of making and using the same. The active pixel sensor cell approximately doubles the available signal for a given quanta of light. The device of the present invention utilizes the holes produced by impinging photons in a active pixel sen ...