1
Christopher A Heyden, Jeffrey S Kinne, Mitchell N Rosich, Jeffrey A Wilcox, Jeffrey L Winkler: Non-volatile memory module. EMC Corporation, Weingarten Schurgin Gagnebin & Hayes, August 25, 1998: US05798961 (109 worldwide citation)

A non-volatile memory module includes a charging circuit, a battery couple to the charging circuit, a volatile memory and an electronic switch coupled between the volatile memory and the battery.


2
Jeffrey A Wilcox: Redundant peripheral device subsystem. EMC Corporation, David N Caracappa, John M Gunther, Krishnendu Gupta, March 11, 2003: US06532547 (18 worldwide citation)

A redundant peripheral device subsystem in a computer system is disclosed including first and second peripheral device controllers. First and second peripheral device busses are coupled to the first and second peripheral device controllers, respectively. A controllable switch is coupled between the ...


3
Jeffrey L Winkler, Jeffrey A Wilcox: XOR controller for a storage subsystem. EMC Corporation, Weingarten Schurgin Gagnebin & Hayes, January 14, 1997: US05594862 (16 worldwide citation)

An XOR controller which is capable of performing the XOR operations necessary to generate a new parity value corresponding to new data being written to a disk storage device from a host computer without the intervention of the storage subsystem microprocessor. In one embodiment the storage subsystem ...


4
Jeffrey A Wilcox, Jeffrey L Winkler: Flexible addressing memory controller wherein multiple memory modules may be accessed according to comparison of configuration addresses. EMC Corporation, Weingarten Schurgin Gagnebin & Hayes, December 17, 1996: US05586300 (6 worldwide citation)

A controller capable of performing the flexible addressing of memory modules. In one embodiment, involving cache memory, a cache controller maintains, for each slot in cache memory, a read base address and a write base address for the slot and certain characteristics of the SIMM residing in the slot ...


5
Ron L Swartzentruber, Jeffrey A Wilcox: Packet switch having a crossbar switch that connects multiport receiving and transmitting elements. Freescale Semiconductor Incorporated, Gordon E Nelson Patent Attorney PC, May 24, 2007: US20070118677-A1

An integrated circuit on which are implemented a number of devices that conform to the Rapidio network architecture. Included in the integrated circuit are two addressed RapidIO devices and switching devices which provide 24 switching ports. The devices have a packet receiving side and a packet tran ...


6
Ron L Swartzentruber, Jeffrey A Wilcox: Efficient multi-bank buffer management scheme for non-aligned data. Freescale Semiconductor, Gordon E Nelson, Patent Attorney PC, November 16, 2006: US20060256793-A1

An integrated circuit on which are implemented a number of devices that conform to the Rapidio network architecture. Included in the integrated circuit are two addressed RapidIO devices and switching devices which provide 24 switching ports. The devices have a packet receiving side and a packet tran ...