1

2
Jean Marc Bachot, Eric Badi: Method and apparatus for accessing a memory core multiple times in a single clock cycle. Texas Instruments Incorporated, Ronald O Neerings, Wade James Brady III, Frederick J Telecky Jr, April 25, 2006: US07035985 (4 worldwide citation)

An apparatus and method for using self-timing logic to make at least two accesses to a memory core in one clock cycle is disclosed. In one embodiment of the invention, a memory wrapper (28) incorporating self-timing logic (36) and a mux (32) is used to couple a single access memory core (30) to a me ...


3
Jean Marc Bachot, Eric Badi: Method and apparatus for accessing a memory core multiple times in a single clock cycle. Texas Instruments Incorporated, June 10, 2004: US20040109381-A1

An apparatus and method for using self-timing logic to make at least two accesses to a memory core in one clock cycle is disclosed. In one embodiment of the invention, a memory wrapper (28) incorporating self-timing logic (36) and a mux (32) is used to couple a single access memory core (30) to a me ...


4
Jean Marc Bachot, Eric Badi: Method and apparatus for accessing a memory core multiple times in a single clock cycle. Texas Instruments Incorporated, June 12, 2003: US20030110363-A1

An apparatus and method for using self-timing logic to make at least two accesses to a memory core in one clock cycle is disclosed. In one embodiment of the invention, a memory wrapper (28) incorporating self-timing logic (36) and a mux (32) is used to couple a single access memory core (30) to a me ...