1
David L Roper, James W Cady, James Wilder, James Douglas Wehrly Jr, Jeff Buchle, Julian Dowden: Pitch change and chip scale stacking system. Staktek Group, Andrews Kurth L, J Scott Denko, May 30, 2006: US07053478 (108 worldwide citation)

The present invention stacks integrated circuits into modules that conserve board surface area. In a two-high stack or module devised in accordance with a preferred embodiment of the present invention, a pair of integrated circuits is stacked, with one integrated circuit above the other. The two int ...


2
James W Cady, James Wilder, David L Roper, James Douglas Wehrly Jr, Julian Dowden, Jeff Buchle: Chip scale stacking system and method. Staktek Group, June 10, 2003: US06576992 (105 worldwide citation)

The present invention stacks chip scale-packaged integrated circuits (CSPs) into modules that conserve board surface area. In a two-high CSP stack or module devised in accordance with a preferred embodiment of the present invention, a pair of CSPs is stacked, with one CSP above the other. The two CS ...


3
Carmen D Burns, Jerry Roane, James W Cady: Ultra high density integrated circuit packages. Staktek Corporation, Fulbright & Jaworski L, August 27, 1996: US05550711 (83 worldwide citation)

Thin and durable level-one and level-two integrated circuit packages are provided. A thin and durable level-one package is achieved in one method involving a molding technique of evenly applying molding compound to an integrated circuit die element. The casing surrounding a die element may be reduce ...


4
Russell Rapport, James W Cady, James Wilder, David L Roper, James Douglas Wehrly Jr, Jeff Buchle: Memory expansion and chip scale stacking system and method. Staktek Group, Andrews Kurth, July 5, 2005: US06914324 (73 worldwide citation)

The present invention stacks chip scale-packaged integrated circuits (CSPs) into modules that conserve PWB or other board surface area. In another aspect, the invention provides a lower capacitance memory expansion addressing system and method and preferably with the CSP stacked modules provided her ...


5
Carmen D Burns, David Roper, James W Cady: Flexible circuit connector for stacked chip module. Staktek Group, J Scott Denko, June 3, 2003: US06572387 (72 worldwide citation)

The present invention provides a flexible circuit connector for electrically coupling IC devices to one another in a stacked configuration. Each IC device includes: (1) a package having top, bottom, and peripheral sides; and (2) external leads that extend out from at least one of the peripheral side ...


6
Carmen D Burns, David Roper, James W Cady: Flexible circuit connector for stacked chip module. Staktek Group, J Scott Denko, June 27, 2006: US07066741 (65 worldwide citation)

The present invention provides a flexible circuit connector for electrically coupling IC devices to one another in a stacked configuration. Each IC device includes: (1) a package having top, bottom, and peripheral sides; and (2) external leads that extend out from at least one of the peripheral side ...


7
James W Cady, John P Barr Jr: Multiwire cable. Arrowsmith Shelburne, Pretty Schroeder Brueggemann & Clark, January 28, 1992: US05084594 (65 worldwide citation)

A low cost high signal frequency multiwire cable and method of manufacture includes a stack of wire pairs fan folded from a flat ribbon cable to form columnated wire pair layers. The flat ribbon cable is folded together with a flexible conductive shield which extends around and between each layer to ...


8
James W Cady, Julian Partridge, James Douglas Wehrly Jr, James Wilder, David L Roper, Jeff Buchle: Low profile chip scale stacking system and method. Staktek Group, Andrews Kurth, J Scott Denko, April 11, 2006: US07026708 (64 worldwide citation)

The present invention stacks chip scale-packaged integrated circuits (CSPs) into low profile modules that conserve PWB or other board surface area. Low profile contacts are created by any of a variety of methods and materials. A consolidated low profile contact structure and technique is provided fo ...


9
James W Cady, James Wilder, David L Roper, James Douglas Wehrly Jr: Integrated circuit stacking system and method. Staktek Group, Andrews Kurth, J Scott Denko, October 18, 2005: US06956284 (61 worldwide citation)

The present invention stacks integrated circuits (ICs) into modules that conserve PWB or other board surface area. In another aspect, the invention provides a lower capacitance memory expansion addressing system and method and preferably with the CSP stacked modules provided herein. In a preferred e ...


10
Carmen D Burns, Jerry Roane, James W Cady: Ultra high density integrated circuit packages. Staktek Corporation, Fulbright & Jaworski, August 29, 1995: US05446620 (59 worldwide citation)

Thin and durable level-one and level-two integrated circuit packages are provided. Moisture-barriers may be provided to upper and/or lower surfaces of the thin level-one package. Additionally, a thin level-one package may be constructed with one or more metal layers to prevent warpage. These level-o ...