1
Douglas D Gephardt, James R MacDonald, Rita M O Brien: Power management architecture including a power management messaging bus for conveying an encoded activity signal for optimal flexibility. Advanced Micro Devices, B Noel Kivlin, February 20, 1996: US05493684 (130 worldwide citation)

An integrated processor is provided that includes a CPU core coupled to a variety of on-chip peripheral devices such as a DMA controller, an interrupt controller, and a timer. The integrated processor further includes a power management message unit coupled to the DMA controller, interrupt controlle ...


2
James R MacDonald, Drew Dutton, Steve Cox: Memory paging system and method including compressed page mapping hierarchy. Advanced Micro Devices, David W O Brien, Skjerven Morrill MacPherson Franklin & Friel L, December 9, 1997: US05696927 (114 worldwide citation)

A memory paging and compression system for a computer having a memory and an execution unit includes an address mapping hierarchy, a compressed page mapping hierarchy, a translation lookaside buffer, and a compression/decompression component. The address mapping hierarchy includes page tables having ...


3
Sherman Lee, James R MacDonald, Michael T Wisor: Method an apparatus for encrypting and decrypting microprocessor serial numbers. Advanced Micro Devices, B Noel Kivlin, Conely Rose & Tayon, June 30, 1998: US05774544 (72 worldwide citation)

A method and apparatus for encrypting and decrypting a microprocessor serial number. First and second encryption keys and a serial number are provided in microprocessor machine specific registers. The serial number is encrypted using the first key. The encrypted serial number is encrypted using the ...


4
James R MacDonald: Clock control for power savings in high performance central processing units. Advanced Micro Devices, Foley & Lardner, September 19, 1995: US05452434 (65 worldwide citation)

The invention relates to a clock controller circuit for performing a power saving feature in high performance microprocessors. The invention utilizes two logic gates and a flip flop for disabling a clock signal to an execution unit or ALU when data is not available for the execution unit or ALU. The ...


5
James R MacDonald, Douglas D Gephardt, Dan S Mudgett: Interrupt controller with external in-service indication for power management within a computer system. Advanced Micro Devices, B Noel Kivlin, Conley Rose & Tayon PC, April 13, 1999: US05894577 (64 worldwide citation)

An interrupt controller includes an interrupt request register for receiving interrupt requests from various peripherals or I/O devices via a set of request lines. A priority resolver is further provided for comparing the priority level of the interrupt lines, latching the lower priority requests in ...


6
Sherman Lee, James R MacDonald, Michael T Wisor: Method and apparatus for software access to a microprocessor serial number. Advanced Micro Devices, B Noel Conley Rose & Tayon Kivlin, August 4, 1998: US05790663 (49 worldwide citation)

A method and apparatus for software to access a microprocessor serial number. Provision of the serial number allows the manufacturer better control over its product and also permits software vendors to register their products. The serial number is encrypted using a pair of encryption keys to prevent ...


7
James R MacDonald: System and method for controlling assertion of a peripheral bus clock signal through a slave device. Advanced Micro Devices, B Noel Kivlin, Conley Rose & Tayon P C, February 4, 1997: US05600839 (46 worldwide citation)

A system and method for controlling a peripheral bus clock signal through a slave device are provided that accommodate a power conservation scheme in which a peripheral bus clock signal may be stopped, for example, by a power management unit or other central resource. Prior to stopping the periphera ...


8
James R MacDonald: Programmable cache including a non-lockable data way and a lockable data way configured to lock real-time data. Advanced Micro Devices, B Noel Kivlin, Conley Rose & Tayon PC, June 15, 1999: US05913224 (43 worldwide citation)

A computer system is disclosed which provides for execution of real-time code from cache memory. A cache management unit provides the real-time code to the cache memory from system memory upon a initiation of a read operation by a processor. Once in cache memory, the processor executes the real-time ...


9
Sherman Lee, James R MacDonald, Michael T Wisor: Method and apparatus for upgrading the software lock of microprocessor. Advanced Micro Devices, B Noel Kivlin, Conley Rose & Tayon, August 4, 1998: US05790783 (38 worldwide citation)

A method and apparatus for providing, maintaining and upgrading the software lock of a microprocessor. When a processor upgrade occurs, software that was serialized to the previously installed processor detects that it is running on an unauthorized processor. The software initiates a reauthorization ...


10
Douglas D Gephardt, Dan S Mudgett, James R MacDonald: High performance integrated processor architecture including a sub-bus control unit for generating signals to control a secondary, non-multiplexed external bus. Advanced Micro Devices, B Noel Kivlin, September 17, 1996: US05557757 (36 worldwide citation)

An integrated processor that employs a bus interface unit to accommodate high performance data transfers via an external peripheral interconnect bus with multiplexed address/data lines. The peripheral interconnect bus, which may be a PCI standard bus, accommodates data transfers between an internal ...