1
James Pan, Yoon Kim, Josephine Chang, Juinn Yan Chen: Spelling speech recognition apparatus and method for communications. VerbalTek, Robert H Chen, Antoinette F Konski, Baker & McKenzie, October 16, 2001: US06304844 (105 worldwide citation)

An accurate speech recognition system capable of rapidly processing greater varieties of words and operable in many different devices, but without the computational power and memory requirements, high power consumption, complex operating system, high costs, and weight of traditional systems. The uti ...


2
James Pan: Structure and method for forming power devices with carbon-containing region. Fairchild Semiconductor Corporation, Kilpatrick Townsend & Stockton, August 9, 2011: US07994573 (73 worldwide citation)

A field effect transistor (FET) includes body regions of a first conductivity type over a semiconductor region of a second conductivity type. The body regions form p-n junctions with the semiconductor region. Source regions of the second conductivity type extend over the body regions. The source reg ...


3
Jian Ni, Craig A Rosen, James Pan, Reiner L Gentz, Vishva M Dixit: Death domain containing receptor 4 antibody and methods. Human Genome Sciences, The Regents of the University of Michigan, Sterne Kessler Goldstein & Fox P L L C, January 13, 2009: US07476384 (49 worldwide citation)

The present invention relates to novel Death Domain Containing Receptor-4 (DR4) proteins which are members of the tumor necrosis factor (TNF) receptor family. In particular, isolated nucleic acid molecules are provided encoding the human DR4 proteins. DR4 polypeptides are also provided as are vector ...


4
James Pan, Paul Besser, Christy Mei Chu Woo, Minh Van Ngo, Jinsong Yin: Gate dielectric quality for replacement metal gate transistors. Advanced Micro Devices, December 14, 2004: US06830998 (46 worldwide citation)

Gate dielectric degradation due to plasma damage during replacement metal gate processing is cured and prevented from further plasma degradation by treatment of the gate dielectric after removing the polysilicon gate. Embodiments include low temperature vacuum annealing after metal deposition and CM ...


5
Avi Ashkenazi, David Botstein, Luc Desnoyers, Dan L Eaton, Napoleone Ferrara, Ellen Filvaroff, Sherman Fong, Wei Qiang Gao, Hanspeter Gerber, Mary E Gerritsen, Audrey Goddard, Paul J Godowski, J Christopher Grimaldi, Austin L Gurney, Kenneth J Hillan, Ivar J Kljavin, Jennie P Mather, James Pan, Nicholas F Paoni, Margaret Ann Roy, Timothy A Stewart, Daniel Tumas, P Mickey Williams, William I Wood: Secreted and transmembrane polypeptides and nucleic acids encoding the same. Genentech, Elizabeth M Barnes, Mark T Kresnak, Ginger R Greger Esq, October 21, 2003: US06635468 (27 worldwide citation)

The present invention is directed to novel polypeptides and to nucleic acid molecules encoding those polypeptides. Also provided herein are vectors and host cells comprising those nucleic acid sequences, chimeric polypeptide molecules comprising the polypeptides of the present invention fused to het ...


6
James Pan: Mesa isolation technology for extremely thin silicon-on-insulator semiconductor devices. Advanced Micro Devices, April 10, 2007: US07202123 (25 worldwide citation)

Silicon-on-insulator (SOI) structures with silicon layers less than 20 nm in thickness are used to form extremely thin silicon-on-insulator (ETSOI) semiconductor devices. ETSOI semiconductor devices can be efficiently manufactured by mesa isolation techniques. A method of forming a plurality of semi ...


7
Audrey Goddard, James Pan, Minhong Yan: Tumor necrosis factor receptor homologs and nucleic acids encoding the same. Genentech, Diane L Marschang, March 18, 2003: US06534061 (24 worldwide citation)

The present invention is directed to novel polypeptides having homology to members of the tumor necrosis factor receptor family and to nucleic acid molecules encoding those polypeptides. Also provided herein are vectors and host cells comprising those nucleic acid sequences, chimeric polypeptide mol ...


8
James Pan: Shielded gate trench FET with multiple channels. Fairchild Semiconductor Corporation, Townsend and Townsend and Crew, August 10, 2010: US07772668 (16 worldwide citation)

A field effect transistor (FET) includes a pair of trenches extending into a semiconductor region. Each trench includes a first shield electrode in a lower portion of the trench and a gate electrode in an upper portion of the trench over but insulated from the shield electrode. First and second well ...


9
Christy Woo, Paul Besser, Minh van Ngo, James Pan, Jinsong Yin: Method of forming a metal gate structure with tuning of work function by silicon incorporation. Advanced Micro Devices, July 4, 2006: US07071086 (16 worldwide citation)

A method for forming a semiconductor structure having a metal gate with a controlled work function includes the step of forming a precursor having a substrate with active regions separated by a channel, a temporary gate over the channel and within a dielectric layer. The temporary gate is removed to ...


10
Allen S Yu, James Pan: Fabrication of dual work-function metal gate structure for complementary field effect transistors. Advanced Micro Devices, Monica H Choi, March 8, 2005: US06864163 (15 worldwide citation)

For fabricating dual gate structures of complementary field effect transistors, a gate material is deposited into an opening disposed over a P-well and an N-well having the complementary field effect transistors formed therein. A portion of the gate material disposed over one of the P-well or the N- ...



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