1
James Douglas Beasom: Trench MOS gate device. Harris Corporation, Jaeckle Fleischmann & Mugel, June 23, 1998: US05770878 (110 worldwide citation)

The present invention is directed to an improved trench MOS gate device that comprises a trench whose floor and sidewalls include layers of dielectric material, the layers each having a controlled thickness dimension. These thickness dimensions are related by a controlled floor to sidewall layer thi ...


2
James Douglas Beasom: Trench MOS gate device. Fairchild Semiconductor Corporation, Jaeckle Fleischmann & Mugel, April 9, 2002: US06368920 (85 worldwide citation)

The present invention is directed to an improved trench MOS gate device that comprises a trench whose floor and sidewalls include layers of dielectric material, the layers each having a controlled thickness dimension. These thickness dimensions are related by a controlled floor:sidewall layer thickn ...


3
James Douglas Beasom, Craig James McLachlan: Bonded wafer processing. Harris Corporation, Jaeckle Fleischmann & Mugel, September 1, 1998: US05801084 (49 worldwide citation)

Warpage in a bonded wafer is limited by maintenance of a stress compensation layer on the backside of the bonded wafer during device fabrication processing. One embodiment applies a sacrificial polysilicon layer over a stress compensation silicon dioxide layer for bonded silicon wafers. The fabricat ...


4
James Douglas Beasom, Craig James McLachlan: bonded wafer processing. Harris Corporation, Jaeckle Fleishmann & Mugel, July 14, 1998: US05780311 (27 worldwide citation)

Warpage in a bonded wafer is limited by maintenance of a stress compensation layer on the backside of the bonded wafer during device fabrication processing. One embodiment applies a sacrificial polysilicon layer over a stress compensation silicon dioxide layer for bonded silicon wafers. The fabricat ...


5
James Douglas Beasom: Ohmic contact to lightly doped islands from a conductive rapid diffusion buried layer. Harris Corporation, Jaeckle Fleischmann & Mugel, April 20, 1999: US05895953 (16 worldwide citation)

A buried silicide layer 111 in a bonded wafer 105 makes ohmic contact to a heavily doped buried layer 125. A dopant rapidly diffuses through the silicide layer and into the adjacent semiconductor to form the buried layer.


6
James Douglas Beasom: Integration of high voltage lateral MOS devices in low voltage CMOS architecture using CMOS-compatible process steps. Harris Corporation, Charles E Wands, July 22, 1997: US05650658 (15 worldwide citation)

Region forming steps or interconnect-forming steps through which low voltage CMOS devices are formed in a semiconductor wafer are also employed to simultaneously form one or more regions or layers at selected sites of a substrate where high voltage devices are to be formed. Such selective modificati ...


7
Dustin Alexander Woodbury, James Douglas Beasom, James Winthrop Swonger: P-collector H.V. PMOS switch VT adjusted source/drain. Harris Corporation, Jaeckle Fleischmann & Mugel, June 23, 1998: US05770880 (14 worldwide citation)

A PMOS device has an n-type body 12 and a triple source drain diffusion. A first drain region 14 is heavily p-doped to provide ohmic contact to the drain. A lightly doped drain region 16 extends to and beneath a portion of the gate 20. A third shallow moderately p-doped region 50 extends from beneat ...


8
James Douglas Beasom: Method for making ohmic contact to lightly doped islands from a silicide buried layer and applications. Harris Corporation, Nixon Hargrave Devans & Doyle, July 1, 1997: US05643821 (13 worldwide citation)

A buried silicide layer 111 in a bonded wafer 105 makes ohmic contact to a heavily doped buried layer 125. A dopant rapidly diffuses through the silicide layer and into the adjacent semiconductor to form the buried layer.


9
James Douglas Beasom: Integrated circuit containing devices dielectrically isolated and junction isolated from a substrate. Harris Corporation, Jaeckle Fleischmann & Mugel, November 24, 1998: US05841169 (8 worldwide citation)

An integrated circuit comprises a plurality of interconnected semiconductor devices, at least one the interconnected devices being dielectrically isolated from the substrate, and at least one other of the interconnected devices being junction isolated from the substrate. In a preferred embodiment, a ...


10
James Douglas Beasom: Depletable cathode low charge storage diode. Intersil Americas, MH2 Technology Law Group, June 10, 2008: US07385246 (3 worldwide citation)

An integrated circuit device comprising a diode and a method of making an integrated circuit device comprising a diode are provided. The diode can comprise an island of a first conductivity type, a first region of a second conductivity type formed in the island, and a cathode diffusion contact regio ...