1
James Brady: Method and apparatus for accessing a memory device. STMicroelectronics, Theodore E Galanthay, Lisa K Jorgenson, Andre Szuwalski, December 5, 2000: US06157578 (113 worldwide citation)

A device and method for accessing a row of data in a semiconductor memory device in a single operation is disclosed. The device includes a row of latches having a width which matches the width of the memory array in the semiconductor memory device. The device includes precharge and equilibration cir ...


2
Alan Kramer, James Brady: Scanning capacitive semiconductor fingerprint detector. STMicroelectronics, Lisa K Jorgenson, Peter J Thoma, November 13, 2001: US06317508 (109 worldwide citation)

A scanning fingerprint detection system that includes an array of capacitive sensing elements. The array has a first dimension greater than the width of a fingerprint and a second dimension less than the length of a fingerprint. Each of the capacitive sensing elements has a size less than the width ...


3
Alan Kramer, James Brady: Scanning capacitive semiconductor fingerprint detector. STMicroelectronics, Lisa K Jorgenson, Peter J Thoma, June 17, 2003: US06580816 (83 worldwide citation)

A scanning fingerprint detection system includes an array of capacitive sensing elements, the array having a first dimension greater than the width of a fingerprint and a second dimension less than the length of a fingerprint. Each of the capacitive sensing elements has first and second conductor pl ...


4
James Brady: Voltage clamping method and apparatus for dynamic random access memory devices. STMicroelectronics, Theodore E Galanthay, Lisa K Jorgenson, Andre Szuwalski, September 7, 1999: US05949720 (49 worldwide citation)

A circuit for clamping the voltage appearing on the bit lines of a dynamic random access memory (DRAM) device so that the voltage thereon is maintained above the low reference voltage source. The circuit includes pull-up devices connected to the bit lines of the DRAM device. The pull-up devices are ...


5
David C McClure, James Brady: Integrated circuit having multiple data outputs sharing a resistor network. SGS Thomson Microelectronics, Rodney M Anderson, Richard K Robinson, Lisa K Jorgenson, March 24, 1992: US05099148 (40 worldwide citation)

An output driver arrangement for an integrated circuit having multiple output terminals is disclosed. Each of the output drivers is a push-pull driver, with the gates of the pull-up and pull-down transistors each controlled by a logic circuit; the logic circuits perform a logical combination of the ...


6
James Brady, Tsiu C Chan, David S Culver: Polycrystalline silicon contact structure. SGS Thomson Microelectronics, Kenneth C Hill, Lisa K Jorgenson, Richard K Robinson, September 29, 1992: US05151387 (26 worldwide citation)

A contact structure provides electrical contact between two polycrystalline silicon interconnect layers. The lower layer has a silicide layer on its upper surface. The upper polycrystalline silicon layer can be doped with a different conductivity type, and makes an ohmic contact with the silicided r ...


7
David C McClure, James Brady: Stress test for memory arrays in integrated circuits. SGS Thomson Microelectronics, Kenneth C Hill, Robert Groover, Lisa K Jorgenson, June 13, 1995: US05424988 (24 worldwide citation)

A method for stress testing a memory array in an integrated circuit. Control circuitry selects a plurality of row lines at one time. An overvoltage suitable for stressing the cells of the array is placed on the bit lines. Because a block of cells has been selected, the overvoltage is applied to all ...


8
Mark A Lysinger, William C Slemmer, James Brady, David C McClure: Selective bulk write operation. SGS Thomson Microelectronics, Kenneth C Hill, Lisa K Jorgenson, Richard K Robinson, May 10, 1994: US05311467 (24 worldwide citation)

A memory is disclosed having a plurality of memory cells in a memory array arranged in rows and columns, each of the memory cells capable of storing a logic state therein. Each pair of bit lines is associated with one of the columns. A column decoder selects a column in the array responsive to a col ...


9
James Brady Costello, Christine Wilson, Clifford E Smathers, Ashish Puri, Brian Lee Badger, Raymond Paul Stempka, Kathleen M Vash, Jeffery M Smith, Michael Allan Lubak: Method and system for graphically identifying replacement parts for generally complex equipment. General Electric Company, Carlos Hanze Esq, Enrique J More Esq, Beusse Walter Sanks Mora & Maire P A, September 4, 2007: US07266515 (19 worldwide citation)

Computerized method and system for graphically identifying replacement parts for selected equipment and a selected system thereof is provided. The method allows to provide a database comprising detailed parts data about the replacement parts for each assembly of the selected equipment, with the deta ...


10
Kris Givens, Daan Veeningen, James Brady: Well planning system and method. Schlumberger Technology Corporation, Cuong Lam Nguyen, Rodney Warfford, Robert Lord, August 19, 2014: US08812334 (19 worldwide citation)

A method for performing oilfield operations for an oilfield having a subterranean formation with an underground reservoir therein, the oilfield being provided with at least one wellsite with oilfield equipment for extracting fluid from the underground reservoir, involving collecting data comprising ...