1
David M Pfeiffer, David T Stoner, John P Norsworthy, Dwight D Dipert, Jay A Thompson, James A Fontaine, Michael K Corry: High speed image processing computer with overlapping windows-div. Visual Information Technologies, Baker & Botts, September 8, 1992: US05146592 (205 worldwide citation)

An image processor having an image algorithm processor (66) operating under control of a writable control store (94), and a number of parallel image processors (72) operating under control of instruction words from a writable control store (100). An image memory controller (68) receives memory addre ...


2
David M Pfeiffer, David T Stoner, John P Norsworthy, Dwight D Dipert, Jay A Thompson, James A Fontaine, Michael K Corry: High speed image processing system using separate data processor and address generator. Visual Information Technologies, Baker & Botts, January 15, 1991: US04985848 (200 worldwide citation)

An image processor having an image algorithm processor (66) operating under control of a writable control store (94), and a number of parallel image processors (72) operating under control of instruction words from a writable control store (100). An image memory controller (68) receives memory addre ...


3
David M Pfeiffer, David T Stoner, John P Norsworthy, Dwight D Dipert, Jay A Thompson, James A Fontaine, Michael K Corry: High speed image processing computer. Visual Information Technologies, Baker & Botts, July 7, 1992: US05129060 (40 worldwide citation)

An image processor having an image algorithm processor (66) operating under control of a writable control store (94), and a number of parallel image processors (72) operating under control of instruction words from a writable control store (100). An image memory controller (68) receives memory addre ...


4
David M Pfeiffer, David T Stoner, John P Norsworthy, Dwight D Dipert, Jay A Thompson, James A Fontaine, Michael K Corry: High speed image processing computer. Visual Information Technologies, Baker & Botts, April 28, 1992: US05109348 (31 worldwide citation)

Disclosed is an image processor having an image algorithm processor (66) operating under control of a writable control store (94), and a number of parallel image processors (72) operating under control of instruction words from a writable control store (100). An image memory controller (68) receives ...


5
David M Pfeiffer, David T Stoner, John P Norsworthy, Dwight D Dipert, Jay A Thompson, James A Fontaine, Michael K Corry: High speed image processing computer with error correction and logging. Visual Information Technologies, Baker Mills & Glast, September 4, 1990: US04955024 (23 worldwide citation)

Disclosed is an image processor having an image algorithm processor (66) operating under control of a writable control store (94), and a number of parallel image processors (72) operating under control of instruction words from a writable control store (100). An image memory controller (68) receives ...