1
Glen Hush, Jake Baker: Complementary bit resistance memory sensor and method of operation. Micron Technology, Dickstein Shapiro Morin & Oshinsky, February 21, 2006: US07002833 (45 worldwide citation)

A method and apparatus are disclosed for sensing the resistance state of a resistance-based memory element using complementary resistance-based elements, one holding the resistance state being sensed and the other holding a complementary resistance state. A sense amplifier detects voltages dischargi ...


2
Glen Hush, Jake Baker: Complementary bit PCRAM sense amplifier and method of operation. Micron Technology, Dickstein Shapiro Morin & Oshinsky, September 14, 2004: US06791859 (44 worldwide citation)

A method and apparatus is disclosed for sensing the resistance state of a Programmable Conductor Random Access Memory (PCRAM) element using complementary PCRAM elements, one holding the resistance state being sensed and the other holding a complementary resistance state. A sense amplifier detects vo ...


3
Glen Hush, Jake Baker, Tom Voshell: Timing control for a matrixed scanned array. Micron Display Technology, William R Bachand, June 10, 1997: US05638085 (18 worldwide citation)

A matrix display maintains synchronization with an input NTSC composite video signal by combining the functions of a phase locked loop, a column selector, and a row selector. The matrix includes display cells arranged in rows and columns, each display cell enabled for display on receipt of a column ...


4
Glen Hush, Jake Baker: Complementary bit PCRAM sense amplifier and method of operation. Dickstein Shapiro Morin & Oshinsky, May 22, 2003: US20030095426-A1 (13 worldwide citation)

A method and apparatus is disclosed for sensing the resistance state of a Programmable Conductor Random Access Memory (PCRAM) element using complementary PCRAM elements, one holding the resistance state being sensed and the other holding a complementary resistance state. A sense amplifier detects vo ...


5
John Moore, Jake Baker: PCRAM rewrite prevention. Dickstein Shapiro Morin & Oshinsky, July 10, 2003: US20030128612-A1 (13 worldwide citation)

A programmable conductor memory cell is read by a sense amplifier but without rewriting the contents of the memory cell. If the programmable contact memory cell has an access transistor, the access transistor is switched off to decouple the cell from the bit line after a predetermined amount of time ...


6
John Moore, Jake Baker: PCRAM rewrite prevention. Micron Technology, Dickstein Shapiro Morin & Oshinsky, June 21, 2005: US06909656 (12 worldwide citation)

A programmable conductor memory cell is read by a sense amplifier but without rewriting the contents of the memory cell. If the programmable contact memory cell has an access transistor, the access transistor is switched off to decouple the cell from the bit line after a predetermined amount of time ...


7
Glen Hush, Jake Baker, Tom Voshell: Serial to parallel conversion with phase locked loop. Micron Display Technology, William R Bachand, January 28, 1997: US05598156 (10 worldwide citation)

A serial to parallel conversion circuit uses a dynamic shift register in a phase locked loop for an index to access a parallel holding register. The composite input signal includes serial data to be sampled and a synchronizing signal at an integer factor of the sampling serial data rate. The phase l ...


8
Glen Hush, Jake Baker: Method of operating a complementary bit resistance memory sensor. Micron Technology, Dickstein Shapiro, July 10, 2007: US07242603 (9 worldwide citation)

The present invention relates to a method and apparatus for sensing the resistance state of a programmable resistance memory, using complementary memory elements, one holding the resistance state being sensed and the other holding a complementary resistance state. A sense amplifier detects voltages ...


9
Glen Hush, Jake Baker, Tom Voshell: Timing control for a matrixed scanned array. Micron Technology, William R Bachand, Robert J Stern, June 1, 1999: US05909201 (4 worldwide citation)

A matrix display maintains synchronization with an input NTSC composite video signal by combining the functions of a phase locked loop, a column selector, and a row selector. The matrix includes display cells arranged in rows and columns, each display cell enabled for display on receipt of a column ...


10
Glen Hush, Jake Baker, Tom Voshell: Serial to parallel conversion with phase locked loop. Micron Display Technology, William R Bachand, Robert J Stern, October 6, 1998: US05818365 (3 worldwide citation)

A serial to parallel conversion circuit uses a dynamic shift register in a phase locked loop for an index to access a parallel holding register. The composite input signal includes serial data to be sampled and a synchronizing signal at an integer factor of the sampling serial data rate. The phase l ...



Click the thumbnails below to visualize the patent trend.