1
Igor Y Khandros, Thomas H DiStefano: Semiconductor chip assemblies with fan-in leads. IST Associates, Lerner David Littenberg Krumholz & Mentlik, September 15, 1992: US05148265 (560 worldwide citation)

A semiconductor chip having contacts on the periphery of its top surface is provided with an interposer overlying the central portion of the top surface. Peripheral contact leads extend inwardly from the peripheral contacts to central terminals on the interposer. The terminals on the interposer may ...


2
Igor Y Khandros, Thomas H DiStefano: Semiconductor chip assemblies having interposer and flexible lead. IST Associates, Lerner David Littenberg Krumholz & Mentlik, September 15, 1992: US05148266 (531 worldwide citation)

A semiconductor chip assembly is mounted to contact pads in a compact area array. An interposer is disposed between the chip and the substrate. The contacts on the chip are connected to terminals on the interposer by flexible leads extending through apertures in the interposer. The terminals on the ...


3
Thomas H Dozier II, Benjamin N Eldridge, Gary W Grube, Igor Y Khandros, Gaetan L Mathieu: Sockets for electronic components and methods of connecting to electronic components. Form Factor, David J Larwood, Gerald E Linden, June 30, 1998: US05772451 (372 worldwide citation)

Surface-mount, solder-down sockets permit electronic components such as semiconductor packages to be releasably mounted to a circuit board. Resilient contact structures extend from a top surface of a support substrate, and solder-ball (or other suitable) contact structures are disposed on a bottom s ...


4
Igor Y Khandros, Thomas H Distefano: Semiconductor chip assemblies, methods of making same and components for same. Tessera, Lerner David Littenberg Krumholz & Mentlik, October 21, 1997: US05679977 (333 worldwide citation)

Semiconductor chip assemblies incorporating flexible, sheet-like elements having terminals thereon overlying the front or rear face of the chip to provide a compact unit. The terminals on the sheet-like element are movable with respect to the chip, so as to compensate for thermal expansion. A resili ...


5
Benjamin N Eldridge, Gary W Grube, Igor Y Khandros, Gaetan L Mathieu: Method of planarizing tips of probe elements of a probe card assembly. FormFactor, David J Larwood, Gerald E Linden, November 2, 1999: US05974662 (326 worldwide citation)

A probe card assembly includes a probe card, a space transformer having resilient contact structures (probe elements) mounted directly to (i.e., without the need for additional connecting wires or the like) and extending from terminals on a surface thereof, and an interposer disposed between the spa ...


6
Igor Y Khandros: Method of manufacturing electrical contacts, using a sacrificial member. Form Factor, Gerald E Linden, December 19, 1995: US05476211 (317 worldwide citation)

A method for manufacturing raised contacts on the surface of an electronic component includes bonding one end of a wire to an area, such as a terminal, of the electronic component, and shaping the wire into a wire stem configuration (including straight, bent two-dimensionally, bent three-dimensional ...


7
Igor Y Khandros, Gaetan L Mathieu: Flexible contact structure with an electrically conductive shell. FormFactor, David Larwood, Gerald Linden, June 29, 1999: US05917707 (267 worldwide citation)

An interconnection contact structure assembly including an electronic component having a surface and a conductive contact carried by the electronic component and accessible at the surface. The contact structure includes an internal flexible elongate member having first and second ends and with the f ...


8
Igor Y Khandros, Benjamin N Eldridge, Gaetan L Mathieu: Fabricating interconnects and tips using sacrificial substrates. FormFactor, Gerald Linden, Daivd Larwood, November 30, 1999: US05994152 (245 worldwide citation)

Interconnection elements and/or tip structures for interconnection elements may first be fabricated upon sacrificial substrates for subsequent mounting to electronic components. In this manner, the electronic components are not `at risk` during the fabrication process. The sacrificial substrate esta ...


9
Igor Y Khandros, Benjamin N Eldridge, Gaetan L Mathieu, Thomas H Dozier, William D Smith: Contact carriers (tiles) for populating larger substrates with spring contacts. FormFactor, Gerald E Linden, Fenwick & West, September 15, 1998: US05806181 (235 worldwide citation)

The invention relates to making temporary, pressure connections between electronic components and, more particularly, to techniques for performing test and burn-in procedures on semiconductor devices prior to their packaging, preferably prior to the individual semiconductor devices being singulated ...


10
Igor Y Khandros, David V Pedersen: Wafer-level burn-in and test. FormFactor, David Larwood, Gerald E Linden, May 16, 2000: US06064213 (218 worldwide citation)

Wafer-level burn-in and test of semiconductor devices under test (DUTs) includes a test substrate having active electronic components (e.g. ASICs) secured to an interconnection substrate, spring contact elements effecting interconnections between the ASICs and the DUTs. This is advantageously perfor ...