1
Yoshio Kiriu, Shigeru Kaneko, Hiroshi Kosuge: Method for correcting and detecting errors. Hitachi, Antonelli Terry & Wands, September 8, 1987: US04692922 (19 worldwide citation)

A method for correcting and detecting errors using the SEC-DED-SbED code is provided, wherein the information consisting of several blocks of b bits is encoded based on the parity matrix including any of b.times.b matrix X q (q=1 to b) in which each row of b.times.b matrix ##EQU1## is cyclically dis ...


2
Hiroshi Kosuge, Yoshio Kiriu: Error detection system. Hitachi, Fay Sharpe Beall Fagan Minnich & McKee, December 19, 1989: US04888774 (15 worldwide citation)

An error detecting apparatus in which an error within an arbitrary and continuous (b-1) bit block is detected using a SEC-DED-SbED code. The (b-1) bit block is any continuous (b-1) bit block within an information consisting of several b bit blocks. The data are encoded by using a power of a matrix C ...


3
Hiroshi Kosuge, Yoshio Kiriu, Junichi Taguri: Data transmission control device for controlling transfer of large amounts of data between two memory units. Hitachi, Antonelli Terry & Wands, January 12, 1988: US04719563 (13 worldwide citation)

A data transmission control device for controlling the data transfer between two memory means on the basis of an instruction from a processor is disclosed in which the instruction from the processor is decoded, a transfer request is issued to each memory means a plurality of times, depending upon a ...


4
Kazuya Iwasaki, Hiroshi Kosuge, Yoshio Kiriu, Ryoichi Kurihara: Data error correcting/detecting system and apparatus compatible with different data bit memory packages. Hitachi, Hitachi Computer Electronics, Fay Sharpe Beall Fagan Minnich & McKee, September 12, 1995: US05450423 (12 worldwide citation)

Memory expansion using memory packages of different generations is performed without unnecessarily increasing the minimum memory capacity of a memory device and while obtaining a high error detecting ability and high reliability. In expanding the capacity of a memory device by using first generation ...


5
Eiji Fujiwara, Hiroshi Kosuge, Yoshio Kiriu: Error detecting and correcting method and system. Hitachi, Fay Sharpe Beall Fagan Minnich & McKee, October 8, 1996: US05563894 (11 worldwide citation)

An error detecting and correcting apparatus includes a unit for receiving an encoded word including a plurality of b-bit bytes (b is an integer not less than two) and generating syndrome from the encoded word according to a first parity check matrix H.sub.1, and a unit for correcting errors in the r ...


6
Atsushi Morishita, Masahiro Fuda, Hiroshi Kanai, Hiroshi Kosuge, Tsutomu Tawa: Surface-treated metal material and metal surface treatment agent. Nippon Steel Corporation, Mitsui Chemicals, Kenyon & Kenyon, October 11, 2011: US08034456 (1 worldwide citation)

The present invention provides a surface-treated metal material having a film formed on at least a portion of a surface of a metal material, the film containing at least polyurethane resin and silicon oxide, and a metal surface treatment agent used to obtain the surface-treated metal material. The p ...


7
Atsushi Morishita, Masahiro Fuda, Hiroshi Kanai, Hiroshi Kosuge, Tsutomu Tawa: Surface-treated metal material and metal surface treatment agent. Kenyon & Kenyon, September 16, 2010: US20100233490-A1

The present invention provides a surface-treated metal material having a film formed on at least a portion of a surface of a metal material, the film containing at least polyurethane resin and silicon oxide, and a metal surface treatment agent used to obtain the surface-treated metal material. The p ...