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Hirano Yasuhiro, Kawahara Takayuki, Otsubo Hiroyasu, Sakamoto Koji, Ota Masutomi, Hatae Hiroshi, Suzuki Takashi: Home electrical appliance, applicant registering method, order-accepting method, data processing system. Hitachi, August 30, 2002: JP2002-245235 (3 worldwide citation)

PROBLEM TO BE SOLVED: To facilitate setting and management of a cipher key, when adapting a domestic electric apparatus or the like to the terminal equipment of a network mail order or the like.SOLUTION: A data processing system, utilized for the network mail order or the like, is provided with a ho ...


2
Hirano Yasuhiro, Ota Masutomi, Hatae Hiroshi, Kawahara Takayuki, Osabe Taro, Sakamoto Koji: Memory card, information apparatus and information distribution method. Renesas Technology, February 19, 2004: JP2004-054473 (2 worldwide citation)

PROBLEM TO BE SOLVED: To provide a memory card with a use limiting function capable of easily setting a user, a use apparatus, use conditions or the like, and to provide a device and a method applied therewith.SOLUTION: In the memory card 1 with a copyright protecting function incorporated with a co ...


3
Ota Masutomi, Otsubo Hiroyasu, Kawahara Takayuki, Suzuki Takashi, Sakamoto Koji, Hatae Hiroshi, Hirano Yasuhiro: Intercom system. Hitachi, December 20, 2002: JP2002-368888 (2 worldwide citation)

PROBLEM TO BE SOLVED: To provide an intercom having excellent convenience that can identify a visitor with high accuracy even when the visitor is a visitor for the list time and attain communication with the dweller of a visited place. SOLUTION: A reception section 5 acquires a phone number of a mob ...


4
Watanabe Hiromi, Hatae Hiroshi, Nakase Junko, Nakamoto Takashi: Microprocessor. Hitachi, August 29, 2000: JP2000-235490 (2 worldwide citation)

PROBLEM TO BE SOLVED: To improve the availability of an on-chip DRAM. SOLUTION: The bit width of a bus B15 of a DRAM 15 is made wider than the bit width of inside data buses 115 and 116 of a data processing unit 11 and a local data bus B11 for performing access from the data processing unit 11 to a ...


5
Kobayashi Yukifumi, Hatae Hiroshi, Watanabe Hiromi: Image processor. Renesas Technology, March 11, 2004: JP2004-080583 (1 worldwide citation)

PROBLEM TO BE SOLVED: To accelerate an image processing by an MPEG-4 standard.SOLUTION: A memory access controller (100) for accessing an image memory (105) is provided with the information of an X direction image size, a Y direction image size and the storage leading address of an image and pixel d ...


6
Hatae Hiroshi, Watanabe Hiromi: Data processing device. Hitachi, June 1, 2003: TW535107 (1 worldwide citation)

The invention provides a data processing device that utilizes processor to have fast and efficient calculation processing of huge amount of data as done in computation processing of moving vector test in graphics. It uses the local bus 8 with broader bus width than that of data bus 6 of CPU2 to conn ...


7
Ueda Koji, Hatae Hiroshi, Watanabe Hiroki: Signal processing device. Hitachi, October 25, 2002: JP2002-312233 (1 worldwide citation)

PROBLEM TO BE SOLVED: To enable dual port access to a single port memory.SOLUTION: A positive integer is taken as i and a first frequency is taken as h1, and a second frequency is taken as h2, and when an expression h1×i=h2 is satisfied, dual port access to the single port memory becomes possible by ...


8
Hatae Hiroshi, Watanabe Hiroki, Kobayashi Yukifumi: Semiconductor integrated circuit and computer readable recording medium. Hitachi, December 13, 2002: JP2002-358288 (1 worldwide citation)

PROBLEM TO BE SOLVED: To provide a semiconductor integrated circuit capable of executing efficiently SIMD(single instruction multiple data) operation. SOLUTION: A semiconductor integrated circuit (1) comprises an SIMD operation part (3) possible to execute parallel operation of more than one data, a ...


9
Kobayashi Yukifumi, Hatae Hiroshi, Watanabe Hiromi: (Ja) 信号処理装置およびシステム, (En) Signal processor and system. Renesas Technology, Kobayashi Yukifumi, Hatae Hiroshi, Watanabe Hiromi, TSUTSUI Yamato, February 26, 2004: WO/2004/017640

(EN) A signal processor capable of increasing the cache hit ratio while preventing entry conflict between a coded image and a reference image, performing optimum cache control to each image by the capacity, the entry determining method, etc., and increasing the cache hit ratio in the longitudinal di ...


10
Hatae Hiroshi, Watanabe Hiromi: Data processor and device for arithmetic operation. Hitachi, Hatae Hiroshi, Watanabe Hiromi, TAKAHASHI Akio, July 27, 2000: WO/2000/043868

A data processing apparatus for effectively and quickly processing a large amount of data by processors, e.g., for detection of motion vectors in image processing. An SDMD circuit (4) controlled by a CPU (2) is connected with a WORKRAM (12) through a local bus (8) that is wider than the data bus (6) ...



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