1
Michael Karl Gschwind, Harm Peter Hofstee, Martin Edward Hopkins: SIMD datapath coupled to scalar/vector/address/conditional data register file with selective subpath scalar processing mode. International Business Machines Corporation, Keusey Tutunjian & Bitetto P C, Louis J Percello, January 4, 2005: US06839828 (141 worldwide citation)

There is provided a processor designed to operate in a plurality of modes for processing vector and scalar instructions. Register files are each for storing scalar and vector data and address information. A parallel vector unit, coupled to the register files, includes functional units configurable t ...


2
Bishop Chapman Brock, Harm Peter Hofstee, Mark A Johnson, Thomas Walter Keller Jr, Kevin John Nowka: Method and apparatus for controlling power and performance in a multiprocessing system according to customer level operational requirements. International Business Machines Corporation, Richard F Frankeny, Casimer K Salys, Winstead Sechrest & Minick P C, December 28, 2004: US06836849 (89 worldwide citation)

A method and controller for managing power and performance of a multiprocessor (MP) system is described. The controller receives sensor data corresponding to physical parameters within the MP system. The controller also receives quality of service and policy parameters corresponding to the MP system ...


3
David John Craft, Pradeep K Dubey, Harm Peter Hofstee, James Allan Kahle: Method and system for controlled distribution of application code and content data within a computer network. International Business Machines Corporation, Casimer K Salys, Jack V Musgrove, October 13, 2009: US07603703 (61 worldwide citation)

A secure communication methodology is presented. The client device is configured to download application code and/or content data from a server operated by a service provider. Embedded within the client is a client private key, a client serial number, and a copy of a server public key. The client fo ...


4
David John Craft, Pradeep K Dubey, Harm Peter Hofstee, James Allan Kahle: Method and system for controlled distribution of application code and content data within a computer network. International Business Machines Corporation, Libby Z Handelsman, Jack V Musgrove, January 19, 2010: US07650491 (59 worldwide citation)

A secure communication methodology is presented. The client device is configured to download application code and/or content data from a server operated by a service provider. Embedded within the client is a client private key, a client serial number, and a copy of a server public key. The client fo ...


5
Harm Peter Hofstee, Robert Kevin Montoye, Edmund Juris Sprogis: Multi-chip integrated circuit module. International Business Machines Corporation, Joseph P Lally, Casimer K Salys, January 14, 2003: US06507115 (59 worldwide citation)

A multi-chip module is disclosed in which a first die connects to a second set of die via a set of C4 connections within a single package. Low resistivity signal posts are provided within the lateral separation between adjacent die in the second set of die. These signal posts are connectable to exte ...


6
Sang Hoo Dhong, Harm Peter Hofstee, Michael Jay Shapiro: Silicon packaging with through wafer interconnects. International Business Machines Corporation, Casimer K Salys, Bracewell & Patterson L, July 31, 2001: US06268660 (44 worldwide citation)

A package for integrated circuit chips. The package contains a silicon substrate having a top surface and a bottom surface. The package also contains a first means for electrically connecting the integrated circuits to the substrate attached to the top surface of the substrate. A multilevel wiring i ...


7
Chekib Akrout, Harm Peter Hofstee, James Allan Kahle: Processor with redundant logic. International Business Machines Corporation, Joseph P Lally, Casimer K Salys, August 31, 2004: US06785841 (42 worldwide citation)

A system including a central processor and a plurality of attached processors all on a single die are disclosed. Each of the attached processors is preferably functionally equivalent to each of the other attached processors. The system further includes at least one redundant processor that is connec ...


8
Erik R Altman, Peter G Capek, Michael Gschwind, Harm Peter Hofstee, James Allan Kahle, Ravi Nair, Sumedh Wasudeo Sathaye, John David Wellman, Masakazu Suzuoki, Takeshi Yamazaki: Symmetric multi-processing system with attached processing units being able to access a shared memory without being structurally configured with an address translation mechanism. International Business Machines Corporation, Robert A Voigt Jr, Casimer K Salys, Winstead Sechrest & Minick P C, August 17, 2004: US06779049 (40 worldwide citation)

A method and system for attached processing units accessing a shared memory in an SMP system. In one embodiment, a system comprises a shared memory. The system further comprises a plurality of processing elements coupled to the shared memory. Each of the plurality of processing elements comprises a ...


9
Sang Hoo Dhong, Harm Peter Hofstee, Kevin John Nowka, Joel Abraham Silberman: At-speed scan testing. International Business Machines Corporation, Casimer K Salys, Jack V Musgrove, Andrew J Dillon, January 11, 2000: US06014763 (36 worldwide citation)

A method of scanning an integrated circuit, by converting a parallel scan input (scan data and scan control) to serial, passing the serial scan input through scan circuitry to create a serial scan output, converting the scan output from serial to parallel, transmitting the scan output in parallel fr ...


10
Sang Hoo Dhong, Harm Peter Hofstee, Ravi Nair, Steven Douglas Posluszny: Multiprocessor with pair-wise high reliability mode, and method therefore. International Business Machines Corporation, Anthony V S England, Casimer K Salys, August 3, 2004: US06772368 (36 worldwide citation)

In one embodiment a multiprocessing apparatus includes a first processor and a second processor. Each of the processors have their own data and instruction caches to support independent operation. In a normal mode the processors independently execute separate instruction streams. Each of the process ...