1
Curtis Priem, Chris Malachowsky, Bruce McIntyre, Guy Moffat: Apparatus for selecting frame buffers for display in a double buffered display system. Sun Microsystems, Blakely Sokoloff Taylor & Zafman, August 6, 1996: US05543824 (83 worldwide citation)

A double buffered output display system including a first frame buffer, a second frame buffer, a multiplexor for furnishing data to an output display from one of the first or the second frame buffers, apparatus for storing a signal indicating that the multiplexor is to select a different frame buffe ...


2
Guy Moffat: Method and apparatus for increasing the speed of operation of a double buffered display system. Sun Microsystems, Blakely Sokoloff Taylor & Zafman, December 24, 1996: US05587726 (44 worldwide citation)

An output display system including an output display; apparatus for controlling the writing of information to the output display; and a double buffered memory including a first bank of video random access memory for furnishing information to the output display, a second bank of video random access m ...


3
Curtis Priem, Chris Malachowsky, Bruce McIntyre, Guy Moffat: Method and apparatus for providing a configurable display memory for single buffered and double buffered application programs to be run singly or simultaneously. Sun Microsystems, Blakely Sokoloff Taylor & Zafman, April 21, 1998: US05742788 (41 worldwide citation)

An arrangement providing frame buffer memory for an output display by which single buffer and double buffered application programs may be run singly or simultaneously is described. An array of video random access memory sufficient to store data for at least two complete frames is configured in three ...


4
Guy Moffat: Method and apparatus for arranging access of VRAM to provide accelerated writing of vertical lines to an output display. Sun Microsystems, Blakely Sokoloff Taylor & Zafman, August 25, 1992: US05142276 (31 worldwide citation)

An arrangement for writing to and reading from the random access ports of a multibank frame buffer so that individual pixels to be presented in a vertical line on an output display are arranged sequentially from top to bottom in different banks of the frame buffer.


5
Curtis Priem, Chris Malachowsky, Bruce McIntyre, Guy Moffat: Method and apparatus for allowing computer circuitry to function with updated versions of computer software. Sun Microsystems, Blakely Sokoloff Taylor & Zafman, November 19, 1996: US05577232 (22 worldwide citation)

An arrangement for assuring the compatibility of versions of software produced for a particular computer hardware architecture including a hardware version register, apparatus for providing an indication of a version of hardware being utilized to operate a particular version of software, a software ...


6
Curtis Priem, Satyanarayana Nishtala, Michael G Lavelle, Thomas Webber, Daniel E Lenoski, Peter A Mehring, Guy Moffat, Christopher R Owen: Computer system with a shared address bus and pipelined write operations. Sun Microsystems, William S Galliani, Flehr Hohbach Test Albritton & Herbert, October 31, 2000: US06141741 (8 worldwide citation)

A computer system with a multiplexed address bus that is shared by both system memory and by slave devices is described. The slave devices are incorporated into an existing system memory configuration by providing a bus controller to execute a two-cycle address sequence on the multiplexed address bu ...


7
Sandor L Barna, Guy Moffat: Power savings with multiple readout circuits. Micron Technologies, Dickstein Shapiro, November 17, 2009: US07619669 (7 worldwide citation)

An imager with a switch circuit located between, and connected to, the pixel array and associated readout chains. In one embodiment the switch is located within the column sample and hold circuitry; in another embodiment the switch is located between the column sample and hold circuitry and the read ...


8
Sandor L Barna, Guy Moffat: Power savings with multiple readout circuits. Micron Technology, Dickstein Shapiro, November 20, 2012: US08314867 (3 worldwide citation)

An imager with a switch circuit located between, and connected to, the pixel array and associated readout chains. In one embodiment the switch is located within the column sample and hold circuitry; in another embodiment the switch is located between the column sample and hold circuitry and the read ...


9
Sandor L Barna, Guy Moffat: Power savings with multiple readout circuits. Dickstein Shapiro Morin & Oshinsky, July 7, 2005: US20050145777-A1

An imager with a switch circuit located between, and connected to, the pixel array and associated readout chains. In one embodiment the switch is located within the column sample and hold circuitry; in another embodiment the switch is located between the column sample and hold circuitry and the read ...


10
Sandor L Barna, Guy Moffat: Power savings with multiple readout circuits. Dickstein Shapiro, May 6, 2010: US20100110250-A1

An imager with a switch circuit located between, and connected to, the pixel array and associated readout chains. In one embodiment the switch is located within the column sample and hold circuitry; in another embodiment the switch is located between the column sample and hold circuitry and the read ...