1
Mirzafer K Abatchev, Gurtej Sandhu, Luan Tran, William T Rericha, D Mark Durcan: Method for integrated circuit fabrication using pitch multiplication. Micron Technology, Knobbe Martens Olson & Bear, October 3, 2006: US07115525 (284 worldwide citation)

Different sized features in the array and in the periphery of an integrated circuit are patterned on a substrate in a single step. In particular, a mixed pattern, combining two separately formed patterns, is formed on a single mask layer and then transferred to the underlying substrate. The first of ...


2
Gurtej Sandhu, Pierre Fazan: High dielectric constant capacitor and method of manufacture. Micron Semiconductor, Stephen A Gratton, August 2, 1994: US05335138 (198 worldwide citation)

A high storage capacity capacitor for a semiconductor structure includes a barrier layer formed on a polysilicon electrode, a lower electrode, a dielectric layer, and an upper electrode. The dielectric material is formed of a high dielectric constant material such as BaSrTiO.sub.3. In order to prote ...


3
Gurtej Sandhu, Garo J Derderian: ALD method to improve surface coverage. Micron Technology, Dickstein Shaphiro Merin & Oshinsky, March 12, 2002: US06355561 (162 worldwide citation)

A method of depositing a thin film on a substrate in a semiconductor device using Atomic Layer Deposition (ALD) process parameters exposes the substrate to at least one adherent material in a quantity sufficient for the material to adsorb onto the substrate and thereby form an initiation layer. The ...


4
Gurtej Sandhu, Richard L Elliott, Trung T Doan, Jody D Larsen: IC mechanical planarization process incorporating two slurry compositions for faster material removal times. Micron Technology, July 30, 1996: US05540810 (108 worldwide citation)

The present invention relates to integrated circuits (ICs) fabrication. Particularly, there is a cmp process which incorporates small quantities of two chemicals. The first chemical is the standard slurry mixtures, like water, aluminum-oxide and hydrogen-peroxide mixed into a slurry. The second chem ...


5
Vishnu K Agarwal, Gurtej Sandhu: Structurally-stabilized capacitors and method of making of same. Micron Technology, Dickstein Shapiro Morin & Oshinsky, December 23, 2003: US06667502 (96 worldwide citation)

Structurally-stable, tall capacitors having unique three-dimensional architectures for semiconductor devices are disclosed. The capacitors include monolithically-fabricated upright microstructures, i.e., those having large height/width (H/W) ratios, which are mechanical reinforcement against shear f ...


6
Gurtej Sandhu, Trung T Doan: Atomic layer doping apparatus and method. Micron Technology, Dickstein Shapiro Morin & Oshinsky, April 1, 2003: US06541353 (91 worldwide citation)

An improved atomic layer doping apparatus is disclosed as having multiple doping regions in which individual monolayer species are first deposited and then dopant atoms contained therein are diffused into the substrate. Each doping region is chemically separated from adjacent doping regions. A loadi ...


7
Shubneesh Batra, Gurtej Sandhu: Method of forming a non-volatile electron storage memory and the resulting device. Micron Technology, Dickstein Shapiro Morin & Oshinsky, February 28, 2006: US07005697 (74 worldwide citation)

The invention provides a method of forming an electron memory storage device and the resulting device. The device comprises a gate structure which, in form, comprises a first gate insulating layer formed over a semiconductor substrate, a self-forming electron trapping layer of noble metal nano-cryst ...


8
Gurtej Sandhu, Roger Lee, Dennis Keller, Trung T Doan, Max F Hineman, Ren Earl: Self-aligned, magnetoresistive random-access memory (MRAM) structure utilizing a spacer containment scheme. Micron Technology, Dickstein Shapiro Morin & Oshinsky, March 19, 2002: US06358756 (70 worldwide citation)

This invention pertains to a method of fabricating a MRAM structure and the resulting structure. The MRAM structure of the invention has the pinned layer recessed within a trench with the upper magnetic layer positioned over it. The method of MRAM fabrication utilizes a spacer processing technique, ...


9
Cem Basceri, Gurtej Sandhu: Methods for forming conductive structures and structures regarding same. Micron Technology, Mueting Raasch & Gebhardt P A, March 18, 2003: US06534357 (58 worldwide citation)

A method for forming a metal/metal oxide structure that includes forming metal oxide regions, e.g., ruthenium oxide regions, at grain boundaries of a metal layer, e.g., platinum. Preferably, the metal oxide regions are formed by diffusion of oxygen through grain boundaries of the metal layer, e.g., ...


10
Mirzafer Abatchev, Gurtej Sandhu: Methods for forming arrays of small, closely spaced features. Micron Technology, Knobbe Martens Olson & Bear, September 30, 2008: US07429536 (53 worldwide citation)

Methods of forming arrays of small, densely spaced holes or pillars for use in integrated circuits are disclosed. Various pattern transfer and etching steps can be used, in combination with pitch-reduction techniques, to create densely-packed features. Conventional photolithography steps can be used ...



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